Photomask Technology 2024

Strong trends drive the semiconductor industry: ubiquitous computing, the energy transformation and artificial intelligence, to name just a few, have the potential to propel the industry towards $1 trillion of sales by 2030. Enabling this trajectory is the extension of Moore’s Law through innovation in semiconductor devices, materials, manufacturing technologies and 3D integration. Moore’s Law, today, is best understood as scaling system energy-efficient performance. To enable chip makers in their pursuit of more powerful, smaller, cheaper, more integrated and more energy-efficient chips, ASML focuses on driving a holistic lithography roadmap with innovation across the entire product and service portfolio. At the core of it is EUV lithography technology. EUV is now mature, and the roadmap offers further improvements in imaging performance, accuracy and productivity, as well as a major reduction in cost per wafer. ASML has shipped the first High NA EUV systems and is enabling customers to run R&D wafers in its High NA lab in Veldhoven, the Netherlands. The new High NA optics, combined with progress on the EUV source, provide the foundation for the future of EUV in the form of a common platform, capable of carrying 0.33 NA, 0.55 NA and 0.75 NA and providing a significant cost reduction opportunity. ASML is committed to push technology to new limits, partnering with all members of our ecosystem, to enable chip makers to realize their ambitions.

The first 0.55NA extreme ultraviolet lithography tools continue to progress towards production without the delays and technology gaps seen with the introduction of 0.33NA EUVL. Carry-over of proven modules and technologies from 0.33NA is providing the expected benefits in predictability and schedule, while the resources concentrated on the innovative anamorphic optics have delivered system-level aberrations and resist imaging performance consistent with the design and planned application of the tools. At the same time, the healthy ecosystem sustained by heavy usage of 0.33NA EUVL in high-volume manufacturing has supported the incremental enhancements in masks, resist, underlayers, etching, inspection, and metrology needed to insert 0.55NA EUVL on the Intel 14A process node. Introduction at this node avoids the need for excessive multi-patterning with 0.33NA EUV, and is particularly beneficial when front-side metal pitches are co-optimized with backside power delivery. With the ecosystem for initial introduction in place, we are already working on enhancements such as a 6x12 mask format to extract the full productivity potential from the High NA platform while simplifying design by eliminating the need to consider die-stitching locations in floor plans for large die. Finally, there is growing optimism that numerical apertures significantly beyond 0.55NA are technically feasible, though work continues to make the business case to justify development of “hyperNA” production tools.

The optical train is a key element of each lithography scanner. The single patterning resolution limit of a scanner is determined by the characteristics and performance of its imaging system consisting of illumination and projection optics. In this paper, we present status and performance parameters of the next generation “High-NA EUV” optical system. Further, we discuss the current NA 0.33 optical system, where key parameters have been improved to support higher productivity in volume production. Additionally, the EUV roadmap and further progress of our developments will be shown.

ASML NXE:3400 and NXE:3600D scanners are now commonly used for High Volume Manufacturing (HVM) of 7 nm to 3 nm logic devices as well as 10 nm class memory devices. This year the ASML NXE:3800E scanner has been released and started shipping to customers to support the next HVM nodes. In this paper we will share the latest performance of these systems, including excellent overlay, critical dimension (CD) control, stability, reliability, and high productivity Furthermore, we will describe the latest technology supporting the ASML roadmap for further improving cost of technology via increased productivity. Lastly the ASML NXE sustainability roadmap showing progress and steps towards a significant reduction in energy consumption per wafer exposure on NXE systems will be presented.

EUV lithography continues to make scaling cost effective for chip manufacturers and allows Moore`s law to pursue. High NA EUV with its increased numerical aperture (NA) from 0.33NA to 0.55NA enables 1.7x smaller features and improved local CDU. This brings several benefits for advance chipmakers such as patterning cost reduction due to multi-patterning, reduced defect density as a result of process simplification and shorter cycle time via mask reduction. Currently, there are multiple high NA EUV systems (EXE:5000) which completed the built and qualification in the ASML factory. The first performance data is being collected via one of these high NA EUV systems. This paper will cover the performance results of the high NA EUV platform (EXE:5000) on imaging and overlay based on the initial findings from common learning collaboration. Furthermore, the progresses towards future high NA EUV systems will be described.

With the recent opening of the joint ASML-imec High NA EUV Lithography Lab, industry has now access to the first High NA EUV scanner(TWINSCAN EXE:5000) to develop High NA EUV use cases. In this paper we will highlight multiple breakthrough results achieved by imec and ASML – in close collaboration with its partners – to ready the patterning ecosystem and metrology for the first generation of High NA EUV Lithography for logic and memory applications.

In this contribution, we will report on High-NA APMI and AIMS-EUV measurements on High-NA anamorphic masks for the first time, along with corresponding wafer print results. We will report on directional effect of CD impact as a function of defect size for both absorber protrusion and intrusion defects. AIMS data collected from anamorphic HiNA masks will be reviewed for the first time, where the images are used to validate aerial images from OPC simulations by aligning the post-threshold measured contours to the OPC contour and quantifying the difference. Additionally, the through focus aerial image performance was also collected and compared to simulated OPC contours.

EUV lithography has been adopted worldwide for High-Volume Manufacturing (HVM) of sub-10nm node semiconductors. To support HVM, EUV pellicles were introduced by ASML in 2016. More recently, novel pellicle materials have successfully been developed and introduced to offer higher transmission and support higher source powers. With the EUV source power roadmap moving towards 800 W and even 1000 W, in combination with the stringent imaging requirements of upcoming nodes, these pellicles will be challenged to the extreme. In this paper, we will give an overview of current status of EUV pellicles, and of options to achieve a 1000W-compatible EUV pellicle. We will discuss both Si-based composite pellicles and CNT-based pellicles. We will discuss robustness against high EUV power and EUV-induced hydrogen plasma, and will cover transmission, imaging and overlay. We will also cover the application of these pellicles to the new high-NA scanners.

There is an increasing need for increased accuracy of etch compact models. We present results of a combination of physically motivated and machine learning compact etch model terms. Results show that by proper feature engineering, our modeling solution can meet these increased needs for accuracy and predictability with no impact on throughput.

With pattern shrinkage of semiconductor devices, new etching process that can achieve accuracy less than 1 nm has been required for the next-generation EUV (Extreme-Ultraviolet) photomask fabrication. For this technological challenge, ALE (Atomic Layer Etching) could be a promising solution for nanofabrication of the next-generation EUV photomask. In this situation, we applied ALE process to etching hard-mask material, particularly Ta mono-oxide (TaO). In this study, we demonstrated the self-limiting etching of TaO hard-mask by optimizing ALE process condition.

In the era of EUV lithography in which the multilayer EUV reflection mirror plays a fundamental role, the accurate determination of the thickness of each constituting layers along with the verification of other physical properties such as the complex index of refraction, is crucial. Particularly for EUV phase shift masks, identifying the relative phase shift, modulated by the phase differences between reflected EUV photons with and without optical paths involving phase-shifting layers, requires measurements with sub-nanometer accuracy. While the commercial EUVTECH EUVNK tool provides angle-resolved specular reflectometry for such EUV masks, the extraction of physical dimension from each individual layer would require a careful approach. Here, we propose a novel, rigorous but simplified method for modeling multilayer systems with the well-known effective medium theory. This capability enables simulations with a precise fit of measured spectra, leading to an accurate and physically robust identification of optical parameters. In this presentation we will share and discuss corresponding details and results from the Samsung photomask shop.

Astrileux and Synopsys demonstrate the performance of new multilayer mask blank materials on photoresists and wafers in next generation lithography. We present new mask materials that exhibit superior on-wafer imaging properties, and improved performance in critical lithography parameters such as dose, critical dimensions (CD), normalized image log slop (NILS) and depth of focus (DOF). Specifically we examine the optimization of material and architecture properties of coatings, and demonstrate how their reflectivity profiles influence the CDs obtained for different pitches, illumination conditions and complex numerical aperture systems. Consequently we can quantify direct improvements in CD as a result of new mask materials and their architectures.

This work embarked on characterization studies evaluating EUV low-n absorber materials (EUVPSM), which meets EUV mask fabrication requirements for impending 2nm and below advanced semiconductor device nodes. Through simulation and material evaluations, low-n material selection narrowed to one material, which met thickness, PSM phase angle, and EUV reflectivity targets. Characterization consisted of studying mask manufacturing modules from patterning, post-exposure processing, cleaning, and through defect inspection and repair. This low-n absorber material was also evaluated for critical patterning performance looking at key CD control metrics such as resolution, uniformity, linearity, proximity, LER/LWR and pattern fidelity at complex mask designs for 2nm node class and beyond technology. Other modules examined included sidewall angle (SWA) patterned absorber and EUV Black-Border patterning process. With mask manufacturing process established and characterized, EUVPSM mask lithographic performance was evaluated to assess overall EUV printability at Low-NA, and early assessment at High NA conditions examining critical imaging metrics while comparing EUVPSM to standard Ta-based bi

As EUV lithography broadens from binary masks to phase shift masks and prepares for the introduction of high NA, the specifications for optical properties and defects become more stringent. Mask blank fabrication shares a lot in common with wafer fabrication, specifically with polish, thin films and cleans processes, with low yields a significant challenge. A “one die per wafer” equivalence for a mask blank implies process and yield challenges beyond what is capable in contemporary wafer processing. With the recent advent of large-scale data integration technologies for acquisition (tool interface), data normalization and storage, to advanced analytics and artificial intelligence (AI) models, we can now apply this to thin film deposition technology for advanced EUV Bragg reflectors. In addition to enabling the detection of process drift, AI and machine learning (ML) tools predict defect excursions and root cause determination of systematic defects. Advanced image classification by AI models, pushing beyond the limits of OEM inspection tools, adds detection capability beyond current benchmarks and provides additional capability for next generation EUV mask blank development.

High-resolution EUV mask patterning capability has been one of the key factors to enable sub-10 nm nanofabrication. As the transition towards high-numerical aperture (NA) EUV technology is ongoing to extend Moore’s law beyond 2 nm-node, this novel exposure system challenges photomask manufacturing for higher resolution and accurate patterning fidelity due to reduced resolution limit. Therefore, development of photomask lithography technologies including improved mask writer, photoresist, new materials of the substrate, and optimized EUV process is necessary to meet the desired minimum feature size. This paper aims to establish the evaluation method for optimized photomask process in upcoming high-NA EUV era. We analyze the budget of factors contributing to EUV mask patterning performance and evaluate the total process window using Multi-Beam Mask Writer (MBMW).

Advanced electron beam photomask writers operate at an acceleration voltage of 50kV. Electrons hitting the photoresist at that energy suffer significant forward scattering in the resist and backscattering from the mask stack back into the resist material. The large amount of scattering and its compensation through dose modulation leads to a degradation in process window. This degradation in process window can partially be compensated by reducing the exposure dose in bulk areas of mask patterns while keeping the dose near the edges of the patterns high. We investigate systematically the effect of bulk and sleeve dose levels as well as sleeve width of curvilinear mask patterns on process window using a calibrated mask model and show which combinations are most beneficial depending on pattern types.

We have introduced multi-beam mask writer made by NuFlare Technology. It has Pixel Level Dose Correction (PLDC), that is the unique function of NuFlare's machines to improve the mask performance. It realizes to control dose by each pixel, for example edge dose enhancement, that is one of its features, emphasizes the edges of the patterns. LCDU and curvilinear design fidelity have been evaluated by applying this feature. In this presentation, we will discuss PLDC performance and its evaluation result.

The ongoing scaling of semiconductor devices necessitates increasing development of new and disruptive technologies. Curvilinear layout design and optical proximity correction (OPC) are among the innovations facilitating these advancements in technologies. However, they face challenges in mask enablement technology, including issues with mask writing, data volume management, design complexity, mask data representation, mask qualification, and metrology. In this paper, curvilinear mask test patterns and measurement methodologies are newly proposed for mask qualification and masks specification. Using contour-based mask metrology, edge placement error (EPE), mean-to-target (MTT) and uniformity (CDU) based on target minimum curvature (TMC) are measured and used as the main qualification metrics instead of traditional metrics such as critical dimensions (CD). These novel methods will partly complement standard qualification methods used for non-curvilinear (Manhattan) masks. A set of unique mask test structures are also proposed to extract the minimum set of curvilinear mask rules which enables experimental definition and verification of the manufacturing process.

E-beam lithography in mask manufacturing is challenged by new requirements from optical and photonic applications. We will show how semiconductor parameters like CD uniformity or line edge roughness translate into optical performance parameters like total stray light or transmission loss, and how to fine-tune the process parameters accordingly. Further, the optical designs, with their curved and angled structures, in contrast to the classical Manhattan like structures in semiconductor designs, require adapted data preparation and lithography solutions. Some application examples including the respective optical measurements will show how our approach, using Vistec’s data preparation solution ePLACE with the Vistec Variable Shaped Beam systems, provides the required optical performance maintaining throughput at the same time.

In Electron Beam (EB) exposure for Extreme Ultraviolet (EUV) masks, it is well known that the backscattering behavior differs significantly from conventional photomasks due to their film structure. In particular, short-range scattering derived from the Mo/Si multilayer film increases, causing the resist film to be more strongly affected within narrower range. To compensate for the error in Critical Dimension (CD), Proximity Effect Correction (PEC) in EB writer must be aware of this short-range scattering. While PEC calibration is typically done using the expertise of skilled engineers, adjusting the parameters of the multi-gaussian model significantly increases the burden on engineers due to the complexity of the phenomenon. In this paper, we introduce a method that automates the procedure of PEC parameter optimization by applying Mask Process Correction (MPC) model calibration techniques and providing feedback on backscattering components from empirically fitted model. Furthermore, we demonstrate the validity of our approach through exposure experiments for calibration and verification parts.

The semiconductor industry is growing at an annual rate of 6.9% (according to Prismark Semiconductor and Packaging Report Q4, 2023 forecast for 2023-2028), and the production of semiconductor devices is increasing accordingly. Currently, device manufacturing using Extreme Ultraviolet (EUV), referred to as 2 nm technology, has begun for AI and mobile phone devices. On the other hand, the production of devices using >90 nm technology, known as mainstream, for the automobile industry and sensing devices, including power, analog, and discrete, is also increasing, leading to an increase in the production of photomasks. However, the reality is that the production of photomasks for the relevant technology is using outdated equipment, and there is a need for equipment with high productivity. In this study, we investigate how e-beam masks for devices used in the mainstream technology compares to masks manufactured with current high-productivity DUV laser equipment and will focus on the following aspects and provide a comprehensive report. Comparison with manufactured masks based on current technologies in terms of CDU, Registration, resolution, printability and so on.

Inverse Lithography Technology (ILT) has been widely explored as a new mask correction technology to further improve the imaging performance in advanced imaging at low-k1 lithography regime. ILT naturally generates complex nonrectilinear mask shapes, which is a challenge to accurately characterize ILT mask. Applying contour-based mask quality characterization has been considered as a more reliable solution. In this work, we’ve developed an offline batch contour-based methodology flow. It includes contour extraction from SEM images, contour-layout alignment, SEM contours GDS merge, polygon-based SEM contour GDS analysis, statistics and visualization. Based on this methodology flow, we’ve quantified CD, CDU, CD linearity of an ILT Mask which has been manufactured by a Variable Single Beam e-Beam writer. Besides, we’ve explored the impact of mask quality on wafer printing performance (NILS, Pvband and CD) based on a clipped mask contour GDS and lithography model.

Micron is readying ourselves for EUV use of free-form curvilinear ILT, by anticipating the need for full reticle processing of Mask Process Correction (MPC) including dose-based near-term and mid-range effects and variable bias for process effects that are not dose based. Verifying that such a capability works with inline processing as the machine writes the mask. The correction was verified on several full reticle curvilinear free-form patterns for EUV using 16nm pixel multibeam writer, the MBM-2000PLUS with the Pixel-Level Dose Correction (PLDC) capability. CD linearity down to 40nm mask features were shown to be within 1nm. As all corrections are performed inline, there is no separate preprocessing step that takes turnaround time (TAT), or explodes the file sizes due to mask process correction. This is a zero TAT solution where files output by ILT and verified by mask rules check (MRC) can be read directly by the mask writer for immediate processing. We will include inspection results and SEM pictures and plotted results comparing the shapes with and without correction. We will also show superior LCDU obtained using pixel-based edge enhancement.

Inverse Lithography Technology (ILT) is widely recognized as a highly effective approach for optimizing the process window in immersion lithography. The inherent all-angle characteristics of ILT present unique challenges in modeling and simulation compared to traditional Optical Proximity Correction (OPC) technology. In this study, we introduce a novel ILT modeling method that incorporates all-angle gauges and a curvilinear mask to enhance the model accuracy. Initially, we design a curvilinear mask featuring typical pattern types. Subsequently, following mask fabrication and wafer exposure, all-angle gauges are generated using the extracted CDSEM image contours. By conducting rigorous model fitting and validation procedures, the calibrated ILT model showcases superior performance metrics when compared to traditional OPC models, particularly in terms of Root Mean Square (RMS) error, error range, and inspection ratio. These advancements will culminate in significantly more precise outcomes in ILT mask correction applications.

As semiconductor device scaling continues to challenge lithographic capabilities, complex corrections such as those offered by inverse lithography technology (ILT) have become essential. The MULTIGON record, developed to utilize Bezier curves for efficiently representing curved mask patterns through ILT, has been incorporated into the SEMI P49 extension of the OASIS format. Over time, as the standard format has been established, EDA vendors and mask manufacturing equipment makers have progressively implemented these specifications, enabling them to evaluate using various real-world data. Our earlier study has not only addressed the handling of Bezier curves in Mask Data Preparation (MDP) but have also raised and discussed fundamental issues regarding the necessary geometric operations for MDP, exploring potential problems that might arise. This paper evaluates their practical application in mask layouts, specifically focusing on the challenges associated with implicit Bezier curve representations.

With the adoption of multi-beam mask writers (MBMW), complex curvilinear patterns have become increasingly prevalent due to their advantages, such as a larger process window on the wafer. However, from a Mask Data Preparation (MDP) point of view, curvilinear data poses challenges related to increased data volume and computational demands. To address these challenges, the Curvilinear Working Group has introduced a new MULTIGON record as an extension of the OASIS format. The MULTIGON record represents curvilinear data as a combination of parametric curves. This paper focuses on applying Implicit Bézier curve representation in MPC without converting MULTIGON to PWL. We will review the capabilities of Bézier-based MPC for MULTIGON input in terms of computational performance, output data volume, and correction accuracy. Additionally, we will highlight the advantages of utilizing Bézier curve representation for MPC flow over conventional PWL-based curvilinear data.

MRC (mask rule check) is an important step in mask manufacturing. Curvilinear mask produced by curvilinear OPC posts new challenges for MRC tools. Traditional DRC based MRC tools can run into performance and accuracy issues due to large data volume from curvilinear post OPC. In this article, we demonstrate a new algorithm to accurately capture curvy space, width, and curvature. Fast pattern matching algorithm is used to improve performance. We leverage OPC verification infrastructure to perform pattern classification and rich functionality in verification tools to interactively browse MRC violations.

A hybrid ruled-based and model-based MPC solution is introduced in this paper, which is aimed to maintain mask CD accuracy with reduced runtime.

In this paper, we investigate the impact of different Manhattan levels of ILT on the on-wafer image fidelity. We present an illustrative example of a mask with 1D and 2D patterns that are corrected by ILT with different Manhattan levels (marked as mask rule check, MRC). Our results demonstrate that as the MRC decreases, the EPE is reduced and the PW is enlarged, highlighting the superiority of ILT over OPC in terms of a larger PW and reduced EPE. Moreover, we found that Manhattan's EPE was reduced by 30% compared to traditional OPC. And when the MRC value is increased from 15 to 25 nm, there is little change in EPE. When the MRC value is 20 nm, it satisfies both the PW and EPE requirements, with a balance manufacturing cost and performance on wafer. On the other hand, we also explore the impact of different electron beam shot sizes on EPE and mask writing time. Our findings suggest that shot size optimization showed a significant effect on both the EPE and mask writing time, further emphasizing the importance of developing efficient and effective lithography techniques for advanced node chip manufacturing.

In order to explore the influence of laser field intensity distribution on exposure outcomes in laser direct writing lithography (LDWL) systems and propose strategies for controlling the distribution of light field intensity, this paper investigates the impact of 365nm LDWL laser field intensity distribution on exposure outcomes. A large number of lithography experiments were conducted, and the exposure results of critical dimension (CD), normalized image log slope (NILS), and pattern shift (PS) under different patterns and laser field intensity distributions were statistically analyzed. This paper provides a clear reference for the influence of laser field intensity distribution on exposure outcomes in LDWL and can promote the development and optimization of LDWL systems.

In semiconductor industry, higher chip performance is required by the market. Photomask that has higher dense pattern for next generation is very important to achieve that requirement. Another requirement from the market is a reduction of PFAS in the manufacturing process because there are of concern due to their persistence in the environment and potential adverse health effects. In SPIE AL 2024, non-PFAS biomass EUV resist has been proposed. The concept of non-PFAS biomass resist is non-edible biomass as a raw material, chain-scission type, positive-tone resist, and stable in pot and during process. By 50 keV EB lithography, hp 8.4 nm L/S pattern with the non-PFAS biomass resist was obtained. Based on these results, non-PFAS biomass resists also has a potential for photomask application. In this paper, we will report some results for photomask application in detail.

Various mask PORs based on ArF PSM and EUV mask are analyzed using Monte-Carlo simulation and EB Mask simulator through empirical method. Energy intensity distribution (EID) and point spread function (PSF) are evaluated, which are determined by electron beam energy and substrate properties. We analyze the correlation of EID, patterning feature and CD of mask process to be optimized for high-grade products. From EB mask simulation, we study the characteristics of PSF generated by electron beam scattering according to changes in energy and material. PSF Gaussian parameter fitting is applied to obtain optimum resist parameters. As a result, we find optimum process parameters that are consistent with the actual process. Using accurate model in simulation, we evaluate the mask error of various mask processes and study the correlation according to different mask conditions. For application and verification, we use complex patterns such as ILT and monitor CD error changes according to blank material (MoSi, EUV), CAR properties (P-type, N-type, sensitivity), and data format (VSB, MALY). Finally, we predict mask error impacts on the ArF process for PSM and EUV lithography.

For mature technology node IC manufacturing, a simple Tritone mask is widely adopted with chrome (Cr) layer remained in Scribe line and border region. The fabrication of a Tritone mask uses a dual step process with an e-beam writer for the 1st writing and a laser beam writer for the 2nd one, which induces process shift and possible Cr residual defects of the 2nd exposure writing. In this paper, NewRay Mask Technology Corporation (NRMTC) proposes a new process with adequate Cr shrinking, which can decrease residual Cr on Mosi/Qz edge and significantly decrease false defects count when the mask is inspected on the KLA TeraScan™ 597XR mask inspection tool with Tritone Die-to-Database inspection mode. Furthermore, a programmed defect mask（PDM）has been designed to explore the optimal Cr shrink distance and shrinking effect on different pattern design area including line space and contact layers with array dies and shuttle dies. Tritone mask production verification conducted with optimal Cr shrink distance also demonstrate that the 2nd etch with optimal Cr shrinking distance can effectively improve the defect inspection process and have extra benefits on Tritone mask inspectability.

With new technology development and adoption in AI, electrical vehicle, telecommunication, IoT and etc, the semiconductor industry is expected to have 8% CAGR from 2022-2030 [1]. As a result, design starts and corresponding photomasks are also expected to experience a significant growth. In the past a few years, the mask making industry has experienced severe capacity shortage. The lead time is largely limited by the challenge to increase mask supply capacity in a short time. Moreover, the obsolescence of legacy mask inspection tools makes it more difficult to support semiconductor growth in near future. In this work, we’ve evaluated KLA’s large pixel upgrade on the existing TeraScanTM 5XX platform. We’ve demonstrated that the large pixel P186 upgrade is able to meet our sensitivity and false requirement of our mature mode manufacturing. More importantly, the upgrade provides throughput improvement to replace 3XX/SLF capability in our mask shop. Each 5XX equipped with P186 is able to replace up to two 3XX/SLF tools for our mask shop use cases. [1] Les Dahl and Bud Caverly, “Factors Driving Merchant Photomask Growth and Shortages”, Proc. of SPIE Vol. 12751, 127510H (2023)

We are developing an objective system for a catadioptric setup used in semiconductor defect inspection at 193 nm in deep UV band. This system comprises seven lenses and two mirrors with a numerical aperture of 0.8 and a total length of 95 mm. Upon analyzing the optical performance of the system, we identified two lenses as the most sensitive components. These lenses will serve as compensators during the assembly and alignment process using an interferometer. In this paper, we present the testing plan for the catadioptric system and discuss the assembly process.

A new technology in which ultrapure water only was electrolyzed non-chemically with low electric power (<100W) was introduced for EUV mask cleaning application. Electrolyzed cathode water minimized the adsorbed residues of previous chemical treatments with minor surface modifications with high PRE(particle removal efficiency). Unlike cavitation effects of other water containing H2 gas, its PRE was significantly improved by increasing megasonic energy. As a result, it has recently been successfully adopted for all EUV mask cleaning as a POR(process of record) recipe clean by two top semiconductor memory chip manufacturers in Korea.

Cleaning processes in advanced 193i and EUV megasonic photomask cleaning continue to have demanding defect requirements, which rely on a narrow process window. To ensure full particle removal and pattern damage control, many parameters must be optimized and controlled, including the transducer output pressure, drive frequency, power setting, and transducer position. Early work from a wired photomask-shaped sensor array revealed the need for a wireless in-situ measurement to characterize how dynamic conditions affect acoustic cavitation behavior. An early version of the wireless sensor was developed to evaluate a system with a single nozzle transducer that swept across the cleaning surface of a rotating photomask. In this study, the technology was further enhanced by improving the form factor and data acquisition capabilities to test a single crystal transducer (i.e., ProSys MegPieTM) fixed above a rotating substrate. The acoustic pressure uniformity across the photomask was evaluated. The study aims to develop an in-situ measurement solution that captures all the process variables that influence the acoustic behavior and, ultimately, the cleaning performance.

Designing or manufacturing an optical system in DUV have been established using refractive optical materials such as fused silica or calcium fluoride. To achieve a higher resolution in optical systems, a larger diameter of optical window is required with very high class of homogeneity. The homogeneity of optical materials is conventionally measured by a Fizeau interferometer. Most optical testing used by Fizeau interferometer is operated in the visible wavelength range. On the other hand, the optical materials of calcium fluoride exhibits a larger dispersion slope in DUV region. Therefore, testing the homogeneity of a CaF2 optical window operating at DUV wavelength using the visible light is not reliable. Thus, we report a comparison of homogeneity measurement of CaF2 at the DUV wavelength using a Fizeau interferometer which is developed for evaluating optical components using a 193 nm DUV laser as a light source.

This research introduces arrays of actionable microelectromechanical systems Fabry-Perot pixels designed for adaptive photolithography. To the authors' knowledge, this is the first demonstration of Fabry-Perot interferometry in the field of optical masks. Each individual pixel functions to either permit or block light transmission by utilizing constructive or destructive interferences facilitated by the Fabry-Perot effect. Through electrostatic actuation, the optical path is modified, primarily by reducing the air gap of the Fabry-Perot pixel. This adjustment yields a transmission contrast exceeding 35%, with the maximum and minimum transmission levels observed at 100% and 63%, respectively. The change in transmission correlates with a decrease in the air gap by 150 nm. These findings illustrate the fundamental principle behind a programmable Fabry-Perot photomask, showcasing its ability to modulate the transmission of ultraviolet light essential in photolithography processes.

Halftone photomasks are a method to reduce the number of photomasks required in FPD manufacturing. They require exposure of two layers with good overlay. We present results obtained with new Heidelberg Instruments VPG+ 1400FPD lithography system which provides with an exposure speed of up to 2900 mm²/min high productivity. Its alignment system offers linear and non-linear position error compensation including the option of mix-and-match with other exposure tools. Exposure results are shown and discussed, especially overlay performance and CDU on G6 halftone photomasks.

Mass-volume production using EUV lithography is getting ready subject to lower defect count, because of the considerably high cost of EUV masks. Defects on a patterned mask require EUV wavelengths for accurate assessment of their CD impact. However, DUV optics are also employed by mask shops and fabs as a cost-effective option, with known limitations, to catch the more obvious defects on EUV patterned masks, as a pre-filtering option. In relation to defect handling in EUV masks without pellicle in memory industry, the most difficult part of EUV mask management is in controlling adder. Detecting smaller adder size is required as mask pattern size is getting smaller in higher technology nodes, which accompanies increased sensitivity of patterned mask inspection and unavoidable increase in noise signal that makes it hard to proper classify mask defects. This paper talks about the details of how DUV inspection optics are utilized to achieve pre-filtering of EUV mask defects. Together with well-tested automatic defect classification algorithms of Calibre® ADC, forms a reliable solution to manage regular classification of mask defects as real or false, under highly sensitive conditions.

The application of KrF 248 nm attenuated phase shift mask (PSM) as a binary mask under ArF 193 nm exposure has the potential to replace conventional binary masks for mature node technologies for less critical layers. KrF PSM is unsusceptible to critical dimension (CD) defectivity issues on wafer, as seen on chrome on glass (COG) masks, nor the high expense to build, as with opaque MoSi on glass (OMOG). We will show wafer data to compare OMOG and KrF PSM performance under ArF processing, as a means of evaluating the prospect of using KrF PSM as a solution to avoid CD degradation and cost impacts for high volume manufacturing.

Aerial image simulation is a crucial, but computationally expensive, tool to understand the projection of a design onto the substrate during lithography, with accurate simulations taking days or weeks to compute. Approximate models that sacrifice fidelity for speed can be employed in time-sensitive applications but introduce additional risks and limitations. Thus, rigorous simulation is generally preferred for high-risk applications, such as defect printability analysis, interjecting unforeseen delays and challenges in a production. We propose an accelerated method of performing aerial simulation with the accuracy of rigorous simulation at the speeds of approximated models using a deep learning (DL) system called the Lithography Foundation Model (LFM). We have incorporated LFM into multi-modal systems (MMS) for applications beyond aerial simulation, including real-time process correction and design optimization. The capabilities of MMS to ingest and understand arbitrary forms of data allows computer systems to closely emulate the minds of a human operator.

To address EUV-induced hydrogen plasma degradation in semiconductor pellicles, we propose a metrology that accelerates failure analysis via hydrogen plasma exposure. This method evaluates the resilience of different pellicle potential protection materials, showcasing oxidation effects by XPS, morphological changes by TEM, and EUVT changes after H2 plasma torture, thus streamlining testing and enhancing EUV lithography throughput.

As the feature size is decreased and the chip integration density increases, more complex OPC is required, leading to increased attempts to reduce computational costs. We tried to optimize a source that could minimize optical proximity errors and improve CD uniformity across different pitches and pattern shapes. Through this optimization, we were able to make the same CDs for various pitches at 0.33 NA and 0.55 NA.

This paper explores the impact of polarization on high NA imaging in EUV lithography for various pitches of line and spaces. The NILS and DOF were simulated under various polarized illumination, and the impact of polarized illumination is analyzed. The result showed that the application of polarization could help to achieve smaller critical dimension in high NA EUV system. As is well known, the polarized source illumination could expand PW, enhance lithographic resolution and improve the pattern fidelity of overall patterns.

We developed novel EUV lighting sources with electron beam irradiation technique. Novel carbon nanotube based cold cathode electron beam(C-beam) developed for EUV lighting. The performance of EUV lighting power and quality depend and C-beam performance of incident angle, anode bias, anode current and beam diameters, Also, the EUV performance depend on the filters and multi-layer mirror (MLM) applications. Detail of EUV performance with C-beam irradiation would be reported.

Energetiq Technology's EQ-10 Electrodeless Z-Pinch™ EUV light source uses xenon plasma to produce 13.5 nm (±1% BW) radiation with an EUV power of ~20W / 2pi / sr. The source has been widely used for mask and optics inspection as well as resist development in both semiconductor production and research applications. In this talk, we will present the next-generation EUV source called “EQS-10,” which enables an EUV power of >40W / 2pi / sr. Primary challenges during the development of this source included maximizing the EUV output while meeting goals on coupling efficiency, Xe consumption, and lifetime. New technologies, such as Xe direct-fueling, solid-state FET switching, and pre-ionization, have been developed to solve these challenges. We utilized both experimental developments as well as plasma, gas, and thermal simulations to provide production-level performance and reliability. We will present the source’s design concepts, current performance, and future plans.

The traditional Statistical Process Control (SPC) Critical Dimension control ("CD") in photomask manufacturing involves collecting data, creating control charts, and analyzing the data to monitor and control the quality of a manufacturing process. The closed-loop SPC system provides timely feedback to the enterprise, enabling necessary actions to maintain a stable manufacturing process. It continuously monitors key process quality parameters and provides instructions to production, playing a crucial role in product control and management. The closed-loop SPC system represents a significant advancement over traditional SPC methods, leveraging modern information technology to enhance manufacturing process control and product quality management. Practical applications can lead to improved efficiency, reduced waste, and better overall product quality. Critical Dimensions in photomask manufacturing refer to precise measurements of features on the mask, crucial for the performance and functionality of semiconductor devices. The Critical Dimension Advanced Statistical Process Control (CD-ASPC) closed-loop System maintains tight control over Critical Dimensions during photomask fabrication

The demand for photomasks in the 45 nm and 65 nm technology nodes is projected to grow steadily in coming years, driven by technological advancements in sectors such as the Internet of Things and autonomous driving. Control over mask production costs especially for the above-mentioned mature nodes plays a crucial role for this mature market segment, creating a high demand for effective and future-proof mask making solutions. In this paper, we present the concept and first data of a new photomask repair platform targeting the mature market segment, e.g., for the technology nodes down to 45 nm: the MeRiT® MG neo. This repair tool has a newly developed platform that incorporates knowledge and industry experience from more than 10 years of high-end node repair technology, i.e. from our MeRiT platform. We show that its modular design enables compact tool footprint, high productivity, and excellent serviceability. We present experimental data demonstrating excellent repair performance and reproducibility for opaque and clear defects on PSM, COG and OMOG photomasks. In addition, the modular SW architecture allows a monitoring of process relevant machine data parameter and leads to a high level of automation. To sum up, the MeRiT MG neo is a future-proof and highly cost-of-technology-optimized solution for the mature market.

Corning has long produced, ULE® (Ultra Low Expansion) glass, which has become the Low Thermal Expansion Material (LTEM) of choice for EUV reticle substrates. Despite continuous improvements, the direct-to-glass process faces challenges in reducing overall thermal expansion uniformity as well as producing striations. In this paper, we present a step change in EUV reticle substrate performance. This new process utilizes an innovative glass forming technique resulting in glass with superior uniformity that avoids the formation of striae, while maintaining the same high purity of current ULE® glass, without any modifications to its physical or chemical properties.

Masks and pellicles are developed further and adapted to meet demands and withstand conditions in EUV lithography. Pellicles are being optimized to withstand exposure to short wavelength illumination. Design, material and manufacturing of pellicles need to be adjusted to achieve optimal expose quality and yield while maintaining a robust “reticle condition” to avoid pellicle failure and to predict possible deterioration of pellicle health. A failure of pellicle during exposure needs to be avoided. Pellicles may need to be replaced before damage occurs based on reliable indicators for damage. In lithography process the pellicle material is under threat to become thinner over wider area. A local rupture of tubes may lead to failure later but be detected in early stage by local variation of thickness. The transparency is key for efficiency of lithography and may change over multiple exposures to short wave light. Scanning the local thickness of pellicles and transparency over entire area of pellicle may give us a good indicator for pellicle health and to reliably prevent failure. Our investigation focusses on local measurement of both thickness and transparency by scanning or imaging to determine uniformity and detect early changes and weakness. Good methods are ellipsometry as first tests indicate and reflectometry for short cycle times and to enable inline examination with high throughput. A CNT pellicle is a network, as the following images show as an example. The optical properties appear to be direction-dependent in the network plane and thus anisotropic, as seen in various studies in the literature. As an additional difficulty, the optical properties also appear to be connected and vary perpendicular to the network plane with different thicknesses of the network and thus density of the network. SEM Images below show two CNT pellicles with different thickness and network density. The anisotropic behaviour of the network can be guessed from distribution of CNT fibres and different density of the two pellicles indicates different optical properties.

Lasertec has developed a new model, the ACTIS A300 series actinic patterned mask inspection system, to meet the requirements of mask inspection for High-NA EUV lithography. The A300 achieves 30% improvement in image contrast on 30nm half-pitch line and space and 64nm contact holes. This contributes to improved defect sensitivity. This paper discusses the impact of pattern edge roughness on inspection in high-NA EUV lithography and how die-to-database inspection using a machine learning-based reference image generation model minimizes the edge roughness effects and further improves the sensitivity of the A300.

Blank mask quality control is vital for achieving high yield in reticle production. Various defects on blanks can easily transfer to the final patterned mask, leading to unnecessary rework and yield loss. Insufficient attention to blank mask quality control results in significant yield reduction. Adoption of blank inspection tool not only can prevent blank defects, but also monitors the process to ensure high yield in optical maskshops. Quanyi Mask and KLA have jointly evaluated and adopted the darkfield blank inspection tool, FlashScan, for optical mask manufacturing. In this paper, we will introduce how we integrate FlashScan® into our mask production process and highlight its applications for yield improvement. Our study illustrates that the adoption of FlashScan significantly enhances yields in the optical mask manufacturing.

As extreme ultraviolet lithographic (EUVL) photomask technology continues to advance to meet the requirements of future technology nodes, significant changes need to be made to the mask that can significantly affect defect repair processes. These changes such as different absorber stack materials and thickness (for example, low-n absorbers), anamorphic projection, larger mask substrates, and non-repeating curvilinear patterns. In this work, rigorous simulation studies are performed and analyzed to determine possible solutions for hard defect repair and particle cleaning of the most advanced next-generation proposed mask technologies and the challenges they present. It is believed this will allow for backwards-optimization of repair processes and strategies starting from aerial image printability requirements.

The introduction of EUV photomasks has posed significant challenges in defect repair over the years. Defects within the unique multi-layer stack used for the reflective optics can easily lead to printing defects on the wafer. Although absorber compensation repair has been successfully demonstrated in high-volume manufacturing (HVM), it has been accompanied by several obstacles. Next-generation EUV lithography for high numerical aperture (NA) EUV photomasks is proving more difficult due to stringent requirements. The advanced scanner optics demand more precise edge control for photomask repairs, necessitating the incorporation of resist effects in the defect review process to better emulate wafer impact. This discussion will cover E-beam-based repair for absorber defects, compensation repair for multilayer blank defects, and the use of resist models to improve defect wafer print impact prediction.

As semiconductor devices continue to shrink in size, the size of minimum particle required to be removed from EUV masks have become smaller and smaller. In the Freeze Cleaning method[1]，[2] developed by Shibaura is innovative cleaning technology that can remove minute particles without impacting the pattern. Moreover, we optimized the cooling method for a quartz plate with a low thermal conductivity in order to obtain high uniformity of temperature distribution over a plate, which can drastically enhance removal rate of particles per a freeze step. Through these our unique measures, we can reduce cleaning time significantly. [1] Kei Hattori. et al., JM3, 044401-1(2020). [2] M. Kamiya. et al., Proc. SPIE 12325, (2022).

In recent years, photomask resist strip and cleaning technology development was substantially driven by the industry's need to prevent surface haze formation through the elimination of sulfuric acid from these processes. In-situ UV technology (ISUV) has been proven to be a valid alternative to strong acid mixtures. The UV light source used so far is a high-pressure Mercury lamp. Along with clear benefits in utilizing the ISUV technology, drawbacks deriving from the use of high-pressure mercury lamps are mitigated, or even eliminated when switching to UV LED’s.

The AIMS® EUV system represents a unique piece of the EUV mask infrastructure for the qualification of the mask printing performance in the aerial image. The AIMS® EUV is tailored to comprehensively emulate all imaging relevant scanner properties, e.g., mask side NA, through slit chief-ray characteristics, aberration level, illumination schemes. With the latest upgrades the system capabilities were extended, and new applications were introduced. To support EUV mask metrology applications for continuously scaling industry requirements, ZEISS developed a next generation EUV mask review tool, the AIMS® EUV 3.0. The new platform offers the industry a more cost-efficient solution with an improved productivity. The system is based on the best-in-class optical performance proven for the current generation and will support 0.33NA isomorphic and 0.55NA anamorphic imaging. Digital Flex Illu will provide the full flexibility of free form illumination available on EUV Scanners and bring SMO functionality (source mask optimization) into the mask shop. In this paper we will review the tool concept and present the first performance data.

Critical dimensions (CDs) on EUV photomasks are rapidly shrinking to print higher resolution features, enhance contrast with sub-resolution assist features, and control the stitching black border with sub-resolution gratings. Reducing mask CDs to 10s of nm necessitates single-nm CD process control and CD metrology with single-angstrom accuracy or better. Furthermore, the ideal probe for an EUV photomask is EUV radiation, due to its short wavelength and sensitivity to any and all optical effects that could potentially impact the EUV aerial image. In this work we present actinic CD metrology using EUV scatterometry performed on the EUV Tech ENK tool, capable of delivering sub-nm or even sub-angstrom CD accuracy. Furthermore, we explore extending the technique to measure more complicated dimensions such as the sidewall angle (SWA) of the absorber. We present experimental demonstrations on the ENK tool of CD and SWA metrology on EUV photomasks.

As HVM of photomasks of various types and processes expands, defects and their origin are of particular concern. Organic materials are present in many aspects of a photomask's lifecycle, from carriers and tool hardware to resists and chemical residues. With the emergence of AFM-NanoIR failure analysis techniques, distinguishing organic defects and thin films with high resolution is limited only by the size of the AFM probe. Using Bruker's Icon-IR lab AFM, we collect IR spectra of many common materials found in our process to build a database, allowing future defects to be matched to our known materials and general external IR databases. To expand our capabilities, an in-line automated AFM with spectra acquisition capability is required, with cleanliness and recipe reliability required for factory use. To support this automated toolset, an automated reporting function has been developed to quickly provide customers with a complete picture of a defect, from AFM scan to IR spectra, complete with IR imaging at wavelengths of interest. This paper seeks to decode the nature of AFM Nano-IR and its place as an essential in-line defect analysis technique.

The performance and characteristics of our broadband EUV source derived from copper-based laser produced plasma, currently in use in our EUV reflectometer and EUV Scatterometry tool are presented in this submission

Given the impracticality of using full-size masks for many analytical instruments due to their size and cost constraints, a critical first step towards advancing novel metrology for mask degradation was to develop and validate a dicing procedure suitable for (EUV-)exposed samples. Small markers were engraved prior to the dicing to facilitate precise navigation to locations of interest, and allow correlation of metrology results with both each other and the EUV dose. Our investigation revealed no discernible changes induced by the dicing process, as confirmed by XPS, SEM, and AFM analyses. Once the masks were diced, novel methods for mask degradation were tested on thermally degraded mask samples: IR-AFM for detection of (near-)surface morphological and chemical changes. XPS-depth profiling with Al Kα (conventional) and Ag Lα (hard) X-ray sources was used to study the sub-surface and the multilayer below the absorber. The project is supported by Chips Joint Undertaking and its members, including the top-up funding of Belgium, the Netherlands and Romania

In our pursuit of ever-shrinking critical dimensions, it is crucial for High Volume Manufacturing (HVM) to have a comprehensive understanding of defectivity at different levels of patterning. Understanding the transferability of defects at the mask writing level and the printability of these defects on the wafers systematically could provide feedback on process development and improve the yield. Our work demonstrates a methodology for programmed defect analysis using mask and wafer SEM images based on defect extraction, highlighting trends observed across various litho and etch processes relevant to the state-of-the-art technology node.

The Semiconductor manufacturing industry has undergone a lot of growth in recent years, especially with the introduction of EUV lithography. However, manual inspection is no longer effective in detecting defects in Photomasks. There is a need for an effective, accurate and automated inspection tool for inspection. This paper presents a novel approach to defect detection in Photomasks by using a Convolutional neural network(CNN) based Patch Distribution Algorithm. The algorithm uses a Pre-trained CNN to learn normal distribution on non-defective Photomask image samples and then test for anomalies in defective Photomask samples. This method is highly accurate in detecting and understanding the severity of the defects on Photomask samples. The results show significant improvements over current state-of-the-art technologies due to the ability to classify Photomask defects beyond the binary or multiclass approach. Finally, the CNN-based patch distribution algorithm used in this work is a huge contribution to the Semiconductor manufacturing industry because it ensures effective quality control, reduces defect levels, and improves productivity.

In this paper, we demonstrate the efficient use of contours extracted from mask SEM images to characterize features with respect to placement, pattern fidelity, and uniformity. Absorber defects, can be automatically detected, and categorized. To assess the probability of mask defect printing, we show how an extracted mask image contour can be used as input for a rigorous lithography 3D resist process simulation to quickly estimate the severity and potential printing behavior in resist of a defect through dose and focus. Simulation results are being validated by wafer data. The results of this work could provide guidelines for the mask making process and mask inspection.

The reticle is not firmly fastened inside the EUV pod. So, during transport and handling, the EUV pod and subjected to vibrations. This can damage thin film coatings and pollute the EUV mask. In this situation, a SEBS (smart EUV blank sensor) is very useful. A SEBS comes with a group of specialized sensors such as vibration, level, and temperature to improve the vibration during transport and handling of the EUV mask blank.

In advanced manufacturing fabs, accurate defect disposition is crucial. A single defect on a mask can potentially impact thousands of wafers, underscoring the criticality of accurate defect disposition. To address this challenge, STMicroelectronics has adopted an intelligent reticle disposition system known as Reticle AnalyzerTM (RA). RA integrates three essential components: Automated Defect Classification (ADC), Lithography Printability Review (LPR) and Defect Progressing Monitor (DPM). In this paper, we present the workflow of ADC, LPR, and DPM products. We discuss the qualification process during production and highlight typical production cases that showcase the advantages of RA adoption. RA’s deployment has proven invaluable in mitigating yield loss, demonstrating its indispensable role in STMicroelectronics fabs.

Pellicles made from free-standing carbon nanotube (CNT) films less than 20 nm thick were characterized for EUV transmission, scattering, reflectivity, mechanical properties, and their ability to withstand EUV radiation under environmental conditions similar to those of an EUV scanner, with power levels ranging from 150 W to 600 W. Various types of coated CNT films were also tested to enhance the pellicles' lifetime. EUV transmission ranged from 98% for uncoated samples to 95% for coated samples. Scattering up to 4.7 degrees was less than 0.1% for uncoated films and 0.2% for coated films. Off-line scanner tests simulating hydrogen plasma conditions demonstrated that the lifetime of CNT pellicles was more than tripled with the use of protective layers. Additionally, new strategies for improving the lifetime of CNT pellicles were tested. New protocols for measuring the mechanical deflection of porous pellicles during pumping down and venting operations were also evaluated.

As Extreme Ultraviolet (EUV) lithography advances with the introduction of high numerical aperture (high-NA) systems, the demands on mask writing technology grow significantly. The latest advancement of Multi-Beam Mask Writers (MBMW) has emerged as a critical solution to meet these demands. The most advanced mask writer, the MBMW-301 enhances resolution and overlay precision, vital for high-NA EUV processes. This presentation will explore the adaptation of multi-beam mask writers to accommodate the intricacies of high-NA EUV lithography, focusing on advancements in beam control, pattern fidelity, and throughput efficiency. We will also discuss how these innovations enable the production of more complex mask designs, crucial for next-generation semiconductor devices. The integration of these systems demonstrates substantial improvements in mask quality and manufacturing adaptability, essential for sustaining the pace of semiconductor scaling and complexity in the high-NA EUV era.

The multi-beam mask writer MBM-3000 has been launched since 2023 for next generation EUV mask production. It is equipped with 12-nm beamlets and a powerful cathode that brings out a current density of 3.6 A/cm2, in order to achieve better resolution and writing speed than our current writer MBM-2000PLUS. New optics with a next-generation blanking aperture array (BAA) is installed to have a 2X beam count. A data generation system has a 2X speed so that it can handle layouts of next-generation EUV masks without a data processing overhead. In this paper, we will introduce improved writing performances of the MBM-3000, and also discuss our future plans towards the angstrom era.

Cost-efficiency is a key performance indicator for maskshop operation.. Laser mask writers are the preferred choice for all layers where they fulfill the requirements due to their lower cost. As a result, masks exposed by laser writers constitute for 70% of all masks used in semiconductor manufacturing. The industry relied for a long time on legacy equipment as applications matured, resulting in a challenge for stable and reliable mask manufacturing in mature design nodes. Mycronic addressed this gap by introducing the SLX series laser writer in 2019. As mask operations continue to strive for higher efficiency, Mycronic has increased the throughput of the SLX writers by utilizing “Meander writing”, which optimizes writing time by exposing on the return stroke of the writing sequence. This enables an increased throughput of the SLX of 20-30%. In this paper, Mycronic will share throughput and performance results from the SLX series by utilizing Meander writing.

‘Systems of chips’ such as 3D ICs and HBMs are already being widely applied in industry sectors such as high-performance computing, mobile, and automotive. The design of such chips has required a ‘hyperconvergence’ of various design and multiphysics disciplines. To fabricate such chips efficiently, we are also beginning to see increased convergence of design, multiphysics, and manufacturing technologies. And AI technologies have proliferated widely in design and manufacturing solutions, helping accelerate the availability of AI platforms, setting up a virtuous cycle of AI helping AI. In this talk, I will survey the state of the industry on these fronts and share some suggestions to accelerate this convergence.

For the innovation of DRAM and Logic semiconductors, EUV Lithography and Mask technology have played a crucial role. In this paper, we will specifically examine the evolution of Mask technology for the development of devices and discuss the development of the ecosystem.

Low-n absorber is a possible candidate of alternative absorber with high NILS and low dose to size. However, in order to apply the low-n absorber to the high-volume manufacturing, various blank, mask, and lithographic performances should be fulfilled such as EUV reflectivity, availability for the etching/repairing, and durability under the scanner environment/cleaning. In this report, we will present our readiness for the low-n absorber blanks. Matching between the candidate low-n absorbers and cap materials will also be discussed

The EUV lithography has been used for the high volume manufacturing of not only Logic devices but also DRAM by using the conventional EUV masks and blanks with Ta absorber. This paper reports the new EUV masks and blanks that we developed for DRAM 1a and beyond. This new masks and blanks can have the higher EUV scanner throughput than the conventional EUV masks and blanks by employing the unique absorber material but can use the conventional EUV mask process. We will show the fundamental properties of the unique absorber material, mask pattern fidelity and EUV scanner throughput of the new EUV masks in comparison with the conventional EUV masks.

New absorber materials such as low n materials and high k materials are currently being developed for next-generation EUV lithography. In this comprehensive study, we conducted detailed evaluations of the characteristics of various absorbers utilizing wafer printability simulations. Thorough analysis was conducted and revealed the inherent strengths and weaknesses of each material, thereby providing a balanced perspective on their performance. In addition to the evaluation based on simulations, the actual mask processability of several promising absorber candidates were assessed.

Current EUV masks based on Mo/Si multilayers (MLs) are optimized for 0.33NA scanners but suffer from severe 3D effects in next-generation 0.55NA systems. Here, we introduce novel Mo/Ru/Si MLs specifically tailored towards mitigating 3D mask artefacts in high-NA imaging. Through numerical optimization of single layer thicknesses, we achieve MLs with ideal performance metrics (FWHM reflectivity ~ 0.85 nm, effective mirror plane depth ~ 31 nm) exceeding those of Ru/Si and Mo/Si counterparts. Furthermore, we leverage state-of-the-art Ion Beam Deposition (IBD) for fabricating test samples of the optimized Mo/Ru/Si design, and we characterize their spectral characteristics using EUV reflectometry. In conclusion, we discuss the impact of various deposition conditions – such as adatom energy and interlayer formation – on the experimental MLs performances.

Novel mask absorber materials have been explored to improve EUV imaging performance concerning film thickness, refraction index n and the extinction coefficient k. A few promising mask absorber candidates were fabricated and evaluated using imec patterning on random logic via design with minimum pitch of 36nm. This study compares the lithography performance of low-n EUV masks with different reflectivity to our Ta-based EUV mask reference. Mask design was with resolution enhancement techniques (RET) including source-mask optimization (SMO), optical proximity correction (OPC) and sub-resolution assist feature (SRAF) to achieve optimum imaging and mask performance. This work discusses the patterning benefits and limitations of different low-n EUV masks, along with the potential to extend the resolution of NA0.33 EUV scanner to accommodate random logic via designs down to 32nm pitch.

Phase Shift Mask(PSM) has been widely investigated in order to improve EUV patterning capability. In this work, rigorous simulation has been employed to identify the cause of the best focus shift shown in PSM and several strategies to find a solution to enable co-patterning of various pitch patterns are suggested. This paper also presents the effect of the sub-resolution assist feature as a method to mitigate the effect of 3D mask in PSM and how PSM helps to improve CD uniformity for various pitch contact array compared to BIN.

This presentation explores the optical principles and practical circumstances that make Displacement Talbot Lithography (DTL) technique one of the leading technology choices for manufacturing high-resolution periodic patterns, which find growing use especially in various photonics applications. DTL, characterized by its non-contact optical patterning, offers advantages including large, seamless exposure fields, large depth of focus, high-resolution capability and uniform, reproducible printing performance. In addition to easily forming simple patterns such as line/space gratings, we have recently shown through an inverse lithography approach to mask design, enabled by machine learning techniques, that DTL has the capability for printing complex shapes like 2D arrays of crosses. Eulitha provides DTL-based tools for manufacturing, ranging from single exposure research models to newly introduced step-and-repeat type tools for large size wafers (+300mm). Fast prototyping and demonstration capabilities provided through a newly expanded application demonstration laboratory help industrial users quickly explore suitability and realize prototypes.

Metaoptics, an emerging field within optics, stands out by manipulating light at subwavelength scales and employing complex structures to control light propagation, interference, polarization, and phase. This technology not only enables the miniaturization of optical components but also introduces advanced functionalities crucial for modern applications including high-resolution imaging, AR/VR and smart-lighting systems. In this presentation, we discuss detailed insights into the design strategy, materials optimization, and fabrication process, which include techniques like lithography, mask design, and etching, all tailored to meet the unique demands of our applications. Our presentation aims to accelerate the development of next-generation miniaturized sensing technologies with unparalleled capabilities.

Metalenses are flat lenses made from thin films that operate using phase effects to manipulate light. Metalenses are used in visible and infrared ranges for applications ranging from infrared facial recognition for cell phones to telescopic imaging of astronomic objects. Understanding metalens performance response to a process variation range accepted by manufacturers can lead to more robust manufacturing processes. This study will simulate metalenses that have been optimized to a specific manufacturing process. Process models will be used to vary process conditions such as etch time, photoresist thickness, or patterned material thickness. The resulting metalenses will be simulated using electromagnetic field solvers to generate lens metrics such as focal efficiency or power attenuation. The resulting simulation data can be used to improve metalens designs and manufacturing processes.

In recent years, new technologies in applied optics and photonics have emerged, which go beyond the classic projection lithography, e.g. AR/VR/MR or meta-lenses. These applications have different requirements to the optical elements. 3 dimensional properties like blazed, slanted, staircase or pyramid profiles at various depths pose new challenges to the manufacturing flow. All these characteristics come along with high resolution demands below 100nm, which is required for patterns across all depths or heights. In this work, we will present the usage of mask technology to generate such complex patterns. In particular, the application of multiple eBeam exposures and Quartz etches can generate 3D topographies in glass which allows very precise alignment and high resolution of such pattern. It will be shown that inter-mixing gratings of different etch depths, meta-atoms with variable heights but also random dots for CHGs or similar can be generated. We will report on the general approach for the individual processes, concluding with some example capability results and an outlook for future developments.

AR/VR device technology is evolving fast thus metrology and measurements must be adapted at the same pace as the process development in closed loop analysis. To answer such constraint, we propose a pipeline based on deep learning able to measure gratings structures from cross section and top-down views. This pipeline was updated in parallel to the process development include additional measurements, new variations of the structures not covered by the algorithm and user feedback for improved metrology. Deep learning can account for such variability, where classic approaches are not able to handle complex 2D structures displaying many degrees of freedom such as size, material and design among others. We illustrate all these challenges with the performances of the pipeline alongside the development cycle requiring modifications of the pipeline. Large batches of data can be processed thanks to the robustness and the speed of the analysis.

Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. This technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. The purpose of this paper is to review the performance improvements in NIL and describe how the advances can be applied to a variety of different devices and applications.

Nanoimprint lithography, NIL, has been developed as next generation lithography because of the advantage of higher resolution and lower cost-of-ownership. The achievement of defect-free template is indispensable. Though we have demonstrated EB repairing technology for NIL templates in the past, yield and turnaround time of repairing remain significant challenges. Recently, we realized that the LELE multiple patterning process can be applicable for repairing. The advantage of this method is turnaround time remains constant regardless of the number of defects. In this presentation, we will report the performance of defect repairing by using multiple patterning technique including the repaired defect evaluation through our replica fabrication process.

The photomask industry is experiencing a fundamental shift from Manhattan masks to curvilinear masks. Recent lithography and mask technology conferences have featured many papers and talks on curvilinear masks, curvilinear OPC, curvilinear ILT, curvilinear mask process correction (MPC), and curvilinear mask formats. Step by step, the photomask industry has started a transition from Manhattan to curvilinear, enabled by the adoption of the new multi-beam mask writers and the advent of practical full-chip curvilinear inverse lithography technology (ILT). The benefits of curvilinear masks go much deeper than is immediately obvious. In this paper we will share our insight on the motivations for the mask world to move toward curvilinear mask shapes. We will evaluate the benefits of curvilinear mask shapes in terms of process window, mask rules, mask error enhancement factor (MEEF), and mask variation. In addition, we will propose a new specification for curvilinear mask metrology, as an equivalent to critical dimension (CD), and we will also demonstrate that curvilinear masks have a tighter mask process variation (PV) band than Manhattan masks using this proposed specification.

As we enter the curvilinear mask and multi-beam writer era, a new fracture engine is needed. In this presentation we introduce an innovative fracture engine called SmartFracture. The new engine can handle the Bezier curves natively, which enables high accuracy and smaller output file size. We will explore the characteristics of Bezier curve data representation and full chip results with the new engine.

In our 2022 paper in SPIE Advanced Lithography + Patterning, we have demonstrated the workflow to do machine learning based error classification on curvilinear designs in feature vector space [1]. The work was initiative. The test case was silicon photonics design, relatively simple compared with curvilinear designs for mask writers [2]. That methodology was also relatively simple, and the metric for the classified results was empirical. In this paper, we develop a sufficient methodology of machine learning based pattern classification that incorporates quantified scoring in metric space as a measure of the classified results. The classification behavior can be controlled by a provided score. This sufficient methodology can do pattern classification on freeform designs, including both Manhattan and curvilinear designs. This methodology can be applied to Optical Process Correction verification (OPC verification), Mask Process Correction verification (MPC verification), Mask Rule Checking (MRC), and beyond.

This paper presents a system for performing mask error correction on both Manhattan (including 45-degree and rotated-Manhattan) and curvilinear shapes. On the Manhattan shapes, the correction may move segments (dissected edges), and on the curvilinear shapes, the correction may move vertices. The segment movement preserves the Manhattan style of the original shapes. Optionally, the vertex movement may be applied on the Manhattan shapes and the corrected results change to be in the curvilinear style. The results of mask error correction on the post-OPC mask of a large logic layout will be reported. Dissection and target-point placement work differently between Manhattan and curvilinear shapes. We will analyze the quality and demonstrate optimization of the mask error correction strategies for input mask data consisting of both Manhattan and curvilinear shapes.

To achieve cell densification in advanced memory devices, an EUV lithography-based process is developed to print 34 nm pitch 4F2 pillar arrays with low defectivity, by screening 4 different mask geometries: square, hexagon, corner cut and circle.

Mask Rule Checks (MRCs) serve as a critical verification step to ensure design integrity and manufacturability of curvilinear masks. However, curvilinear masks can be more challenging to verify as they often involve freeform shapes, higher data complexity and large file sizes [5]. In this paper, we will introduce native Multigon-based curvilinear mask rule checks and present a comprehensive study assessing the effectiveness of these checks in scenarios involving Multigon to Multigon and Multigon to Piecewise-Linear (PWL) checks. We will also study and compare MRC checks on different types of Multigons, namely implicit, explicit and hybrid Multigons. Furthermore, we will study the runtime of Multigon-based CLMRC and compare the performance to equivalent PWL based checks.

This paper reports a pre-processor that simplifies curvilinear figures coming at multiple scales to reduce the degrees of freedom. The downstream consumers include mask error correction (MEC), mask rule check (MRC), and other mask-data processing operations. The multi-scale shape processor provides extensible parameters to control the simplification and coordinate density. As the objective of optimization differs between the downstream consumers, the pre-processor needs to support multiple use-cases. MEC needs to obtain good placement of the vertices defining the curvilinear shapes. MRC and other operations will use different quality metrics. We will use the OASIS P49 Multigon data format to store the simplified results and analyze the benefits of the multi-scale processing system.

One of the more challenging aspects in curvilinear adoption is on determining the optimum tradeoff between pattern complexity, mask manufacturability and wafer imaging. To maximize the benefits of curvilinear masks without incurring an undue impact from mask complexity, it is beneficial to develop layout validation checks such as MRC which can be implemented to achieve an optimum tradeoff. We will present a methodology to perform such curvilinear mask manufacturability optimization using a specially designed set of parametric curvilinear test patterns tied to geometrical MRC generation. Correlations between mask manufacturability and imaging performance are presented in effort to judge the effectiveness of generated mask rules to create an optimized design for a DRAM layer. We revisit the question on whether ILT allows relaxed MRC constraints compared to Manhattan designs for the same layer application. In addition, advanced mask characterization techniques such as 2D contouring are applied to evaluate the limitations of purely geometrical rule checking versus full model based approaches that consider mask pattern fidelity in ILT layout generation.

Mask synthesis and writing is the first and the most critical step in chip making, and its quality has a direct impact on the final wafer yield. In the past two decades, the mask industry has been working with EDA vendors and foundry customers to address the challenges arising from feature-scaling, immortalized by Moore’s law and improve the yield while controlling the cost of mask making within check. Great progresses has been made, and currently three trends are the industry’s consensus: curvilinear masks; ML modeling; GPU for model calibration and mask correction. In this talk, the authors will briefly review the history of how different trends converged to the current status, and report some of the current status of Bezier-spline based curvilinear OPC and ILT on CPU and GPU, and the mask correction with embedded e-beam, lithography and etch models, and point some of the remaining challenges that call for the mask industry, software and hardware vendors, to work together to address them for the wide adoption of the new technologies at the most advanced nodes as well as the more mature nodes.

Meeting the CD (Critical Dimension) linearity and uniformity targets for high-NA EUV photomasks, requires tight control of a wide range of effects contributing to the distortion of the CD signature. So far, many of the factors degrading CD signature have been optimized independently, in particular the compensation of short- and long-range scattering and etch bias effects. Such independent optimization, however, limits the overall mask CD linearity and uniformity results achievable with co-optimization of the different components. In this work, we discuss the co-optimization of short- and long-range corrections on the e-beam writer and through MPC (Mask Process Correction).

In this paper, we present a methodology to analyze the mask curvature manufacturing limits using a calibrated mask process correction (MPC) model, that can simulate the exposure and etch characteristics of the process. A comprehensive set of well-defined test patterns with systematically varying local curvatures (both convex and concave) are used for this study. A well-converged Curvilinear Mask Process Correction (CLMPC) is applied to the patterns and the curvature printability is quantified by studying the final mask edge-placement-error (EPE) at the different curvature locations. The paper concludes that the method presented within can be applied to arrive at a realistic curvature MRC limit specification, which can then be tuned and further optimized, as applicable, based on real measurement data from the mask process.

Upcoming generations of integrated circuits will use anamorphic optics in high NA EUV scanners which will require two or more stitched mask exposures to achieve the equivalent exposure area of previous-generation scanners. The patterning at a stitching boundary between two mask exposures will be affected by additional process variation sufficiently large that the allowed patterns targeted to be printed at a stitching boundary must be restricted relative to patterns printed at other (single exposure) regions on the wafer. Therefore, the physical design of the chip being patterned must be aware of the stitching region and the design tuned to be stitching friendly. In this paper we will first describe the fundamental patterning difficulties involved in high NA EUV stitching. We will evaluate the potential of multiple design and mask synthesis options for enabling stitch-friendly patterning in high NA EUV. We will also show how co-optimization of design and mask synthesis solutions can help ensure manufacturability of stitched patterns while protecting against extensive physical design changes with high NA lithography.

This paper presents an innovative use of machine learning (ML) to improve etch modeling by integrating monotonic machine learning methods with ML-based contour metrology. Unlike traditional methods that rely on single gauge-based data, our approach leverages comprehensive contour data extracted from SEM images to predict etching biases. It handles large datasets efficiently and adapts dynamically to new data. A primary element of our strategy involves constructing a retargeting layer with etch bias, derived from features at multiple sites or points of interest (POIs) on a reference layer which is generated with a fuzzy clustering model. These features and their corresponding etch biases serve as training data for our semi-supervised model which will be used for prediction on large scale designs.

Reaching the full potential of lithography process technology and maximizing yield requires careful modeling each the full process, including exposure, resist development, and mask-writing. The efficiency and scalability of lithography process modeling have become of prime importance, because scaling is necessary to deploy such models in integrated full-chip applications. The efficiency of lithographic exposure modeling has been extensively studied, as numerous compact physical computational models and AI-based models have been devised. On the other hand, modeling efforts for mask writing processes have not caught up. Errors caused by mask-writing have often been corrected with biases or corrections for the mask writing tool. We propose an ML-based mask process model as a solution for the aforementioned problems, as the differentiable nature of the model allows it to be integrated with other parts of the lithography process simulation. The integration of a differentiable mask process model can facilitate moving towards end-to-end mask optimization while eliminating most mask rule check requirements.

Registration correction by localized substrate expansion has been performed on conventional transmission photomasks for several years.  With the implementation of EUV lithography, registration correction has been a challenge due to the opaque backside blank requirements for electrostatic chucking on EUV scanners.  More recently, partially transparent back side coated blanks have been evaluated to enable registration correction on EUV masks.  We will discuss back side coating requirements which meet both scanner requirements and registration correction requirements.  Highlighting the need for back side coating and substrate transmission uniformity control and its impact on registration correction performance.