Going Maskless Brings Benefits

Hacking deterrent systems are being developed
02 March 2020
By Hank Hogan
Panel and audience at SPIE Advanced Lithography 2020
Full audience for talks at SPIE Advanced Lithography 2020.

Going maskless could combat chip counterfeiting. Lithography without masks might also be the key to realizing the benefits of the most advanced chips. Those two assertions were made during presentations at the February 2020 SPIE Advanced Lithography conference.

Regarding chip counterfeiting, David Lam, CEO of Multibeam, said that fake chips lead to an estimated $250 billion revenue hit yearly. He also showed pictures and challenged the audience to spot the legitimate chip from the counterfeit one. To the eye, they looked the same.

Marking real devices with an identifier could help address the counterfeiting problem, if the solution meets certain requirements, Lam said. "The chip ID has to be unique and tamperproof."

His proposed solution exploits multi-column e-beam lithography, as implemented in a tool Multibeam is developing. While masks are extensively used in chip fabrication, it's possible to do lithography without them. All that's needed is a suitable beam that is moved in a controlled manner over a wafer covered with a compatible photoresist. Using this process transfers a pattern to the wafer.

In Multibeam's tool, the beam consists of electrons that come from an array of mini-columns that are each about the size of highlighter. The wafer moves under the column array, with each of the mini-columns acting independently of the others. The recommendation from Multibeam is to use this capability to write an ID into non-volatile memory on a chip by creating a series of via holes that connect the first two metal layers together.

This approach takes a small amount of space on the chip because the memory block and supporting circuitry to support that block and allow a readout of it must be present. There also is a brief detour in the process flow as wafers are moved to, processed through, and then shuttled back from the e-beam machine. In all other respects, though, there's no impact, according to Lam.

An advantage of this approach is that the ID is unique because the e-beam lithography can be changed on the fly. What's more, since the ID is embedded deep within the chip, it cannot be tampered with. The same is not true of the currently favored method, which involves blowing a package-level fuse to embed the ID, according to Lam.

Multibeam has been developing the e-beam lithography tool over the past few years and it will soon be ready, Lam said. He added that the approach can scale to reach whatever throughput is desired because it is modular. The company is also looking into using the same technology for general maskless lithography, a capability that could be a benefit for rapid prototyping and small volume runs.

A second speaker, Thomas Uhrmann noted that advanced semiconductor fabrication has implications for packaging. "If the packaging cannot follow and the functionality of the packaging cannot follow, then at the end of the day it [advanced chip processing] doesn't matter," he said.

Director of business development at the EV Group, Uhrmann discussed how maskless optical lithography for backend processing could help ensure the best possible chip performance. A chart in his presentation showed that packaging is going to a two-micron line/space specification. That requirement is much more challenging than had been the case in the past.

EV Group's proposed solution is a maskless system that uses 375 and 405 nm wavelengths of light to expose photoresist. Being maskless, the system can deal with such requirements as placing individual information on each die. That capability is often requested by automotive component suppliers because it allows hard coding of information as part of a hacking deterrent system, Uhrmann said.

In a Q&A after his talk, Uhrmann noted that most of the company's systems are in research and development settings. As such, throughput is not too much of a concern. However, he said production systems would hit the 60 wafers per hour that are standard in semiconductor manufacturing.

Hank Hogan is a science writer based in Reno, Nevada.

Enjoy this article?
Get similar news in your inbox
Get more stories from SPIE
Recent News
Sign in to read the full article
Create a free SPIE account to get access to
premium articles and original research
Forgot your username?