Room-temperature operation of next-generation spin-based transistor
Over the past 20 years, the performance of central processing units (CPUs) has been improved by reducing the size of device components (e.g., the metal-oxide-semiconductor field-effect transistor, MOSFET). This scaling approach is now failing, however, as a result of inherent physical limitations. For example, quantum-mechanical effects become pronounced in small devices, thereby impeding conventional device operation. Novel approaches to improving CPU performance without reducing the device size are referred to as ‘beyond CMOS’ technologies.
A potential candidate for use in such devices is the spin-MOSFET (i.e., in which the spin of electrons is used for information processing). Spin-MOSFETs consist of a ferromagnetic source, a ferromagnetic drain, and a semiconductor channel (see Figure 1).1 In the source, the density of state (i.e., the number of states per interval of energy) is spin-dependent at the Fermi level. Because of this, charge current in the semiconductor channel is spin polarized (i.e., the spins of all electrons are aligned). This spin polarization gradually decreases during spin transport as a result of ‘spin flip’ (i.e., when the spin direction of an electron is reversed), which can lead to the loss of spin information. The most promising candidate for use as the channel material in spin-MOSFETs is silicon, for two main reasons. First, silicon is compatible with mature large-scale-integration (LSI) technologies. Second, good spin coherence is expected in silicon because the material has a low nuclear-spin density and a weak spin-orbit interaction, thereby minimizing spin flip. To realize the widespread use of silicon-based spin-MOSFETs, however, electrical spin injection from ferromagnetic materials and spin transport in the silicon channel must be viable at room temperature (RT). Of the research that has been conducted in this area, the first demonstration of spin transport in nondegenerate silicon was achieved in 2007 with the use of a hot-electron spin transistor.2 The operating temperature of the device did not, however, reach RT, and its structure and fabrication procedure were not compatible with LSI technologies. To achieve these aims, spin transport using a conventional drain current in a simple MOS-transistor structure has been investigated intensively in recent years. Thus far, spin transport has generally only been achievable by using degenerate n-type silicon.3 It is not, however, possible to control the number of electrons in degenerate silicon. The high channel resistance of nondegenerate silicon (in which such gate functions can be achieved), however, generally induces a high noise level, which prevents high-sensitivity spin detection. High resistivity also impedes efficient spin injection because of the so-called conductance mismatch problem (i.e., most of the injected spins flow back to the ferromagnetic metal as a result of the fast spin relaxation that occurs).
We have developed a nondegenerate silicon-based spin-MOSFET that overcomes these issues and operates efficiently at RT.4 Our approach, which uses tunnel contacts that operate as a tunneling barrier, gives rise to the accumulation of a large amount of spin in the silicon region of the device, thereby leading to a large voltage. Although spin-MOSFETS were first theoretically proposed in 2004,1 this is the first experimental device to exhibit spin-MOSFET characteristics.
In spin-MOSFETs, the information that is generated from the source reaches the drain when the distance between them is less than the spin-transport length. The conductance of the charge current in the drain depends on its magnetization, which in turn depends on the spin-dependent density of state at the Fermi level of the drain. In short, when the magnetization direction of the drain is parallel (or antiparallel) to that of the source, the conductance becomes high (or low). As a result of this feature, our device has two different gate functions (i.e., the conventional electric field in the MOS capacitor and the magnetization configuration of the ferromagnetic source and drain): see Figure 2. The drain-current and gate-voltage characteristics are therefore controlled by the magnetization configuration, which enables the realization of a reconfigurable logic circuit. Moreover, because the device does not change its state based on the applied voltage, it also represents a non-volatile memory.
We achieved spin injection and transport in the nondegenerate-silicon channel by fabricating high-quality iron/magnesium-oxide (iron/MgO) bilayer tunnel contacts (i.e., the source and drain) via molecular beam epitaxy.5 The MgO layer, which operates as a tunneling barrier, solves the conductance mismatch problem and prevents the intermixing of iron and silicon atoms.
To investigate how the characteristics differ between devices based on degenerate and nondegenerate silicon, we developed a local three-terminal magnetoresistance (L-3T MR) measurement technique.6 This highly sensitive spin-detection technique reduces the noise level and enhances the spin signal in the obtained measurements, thereby enabling the demonstration of spin transport in a wide variety of devices with differing channel conductivities, structures, and fabrication procedures. To achieve this measurement, we apply a constant voltage between the source and drain, in combination with an externally applied magnetic field, and measure the resulting charge current. Results from our L-3T MR measurements showed that the spin-transport characteristics of nondegenerate and degenerate silicon channels are completely different. In particular, we found the spin transport length to be drastically modulated with the use of an in-plane electric field in the nondegenerate silicon. Generally, when degenerate silicon is used, injected spins diffuse isotropically because the driving force of spin transport is the spin-concentration gradient. Such isotropic spin transport causes a large loss of spin information, however (i.e., as a result of spin flip). In the nondegenerate silicon channel, on the other hand, an anisotropic spin transport (induced by the electric field) becomes dominant. As a result of this, the injected spin cannot flow away from the current circuit and instead accumulates in the silicon region between the source and drain. By taking advantage of this electric-field-induced ‘spin drift effect,’ we obtained a significantly large spin-accumulation voltage of more than 1.5mV at 1mA (i.e., a magnetoresistance of 1.5Ω) at RT. This is more than an order of magnitude larger than that achieved in semiconductor-based lateral spin valves (see Figure 3).4,6,7
In summary, we have developed a silicon-based spin MOSFET that can operate at RT, making it a potential candidate for beyond-CMOS technology. In our device, conductance between the source and the drain can be controlled by both the gate electric field and the magnetic configuration. To realize practical spin-MOSFET devices, however, the resistance in the antiparallel configuration should be more than twice that of the parallel one. To achieve this, further improvements to the spin polarization of the drain current, as well as a reduction to the parasitic resistance at the interface, are required. With this in mind, we are currently working on the fabrication of novel ferromagnetic materials with high spin polarization and a tunneling barrier with a lower interface resistance than that offered by MgO.