Successes and frontiers in extreme UV patterning
As a semiconductor patterning technique, extreme UV (EUV) lithography has stood at the cusp of viability for over a decade. In this technique, simple single-level patterning is conducted at an exposure wavelength of 13.5nm. EUV lithography brings the promise of delivering the node-by-node feature scaling that is required by the semiconductor industry, but the delay in its implementation has necessitated the adoption of 193nm immersion (193i) multi-patterning techniques to deliver the same scaling, albeit at obvious extra cost and complexity. While the industry has been stuck at 193i-based patterning, the initial lithography and etch steps have remained at relatively unchanged dimensions and have used well-known (and optimized) materials. The step down to EUV-based lithography (i.e., from about 80nm pitch for 193i to about 30nm pitch) therefore brings the need for much thinner, and potentially more etch-selective, patterning materials in the trilayer lithography stack so that the dimensions and aspect ratios required for etch transfer can be achieved. In other words, to meet high-volume manufacturing (HVM) needs, a decade's worth of industry yield learning must be revised in less than five years (see Figure 1).
Over the last couple of years, the industry has made significant progress in tackling many of the main impediments to the adoption of EUV in HVM. Most notably, there have been significant improvements to exposure tool throughput, reliability, and variance control,1 as well as patterning materials with which it is possible to achieve the small dimensions required.2 In addition, we have demonstrated key aspects of EUV mask infrastructure that provide further confidence in the technology as an HVM solution.3, 4 Nevertheless, the implementation of EUV as part of the integrated patterning process is still a remaining challenge.
In our work, we have shown that three or four 193i-based patterning processes can be replaced—in a fairly straightforward manner—with one EUV-based patterning process. In this way we can achieve much tighter yield distributions because of tighter variances at reduced complexity.5, 6 In an example of this approach (see Figure 2) we took a cutout layer of a fin field-effect transistor device (which would normally require four 193i-based processes) and replaced it with one EUV-based process, at 7nm-mode dimensions.
With the use of currently available 0.33 numerical aperture EUV exposure tools, it should be relatively straightforward to achieve the minimum pitch entitlement (26–30nm) for EUV lithography. With the photoresist materials available, however, there has consistently been a need to use high-contrast off-axis illumination or custom illumination shapes to achieve anything close to these pitch entitlements. If the normalized image log-slope aerial image contrast of the various aggressive illumination shapes that are possible for different line-space pitches are simulated, it becomes clear that the minimum pitch line/space feature achievable is 26nm. Although this can be greatly (negatively) modulated if an EUV secondary electron effect is added to the simulation,7 this results in potentially worse contrast and the inability to print smaller pitches (see Figure 3). Alternatively, the effect can be modulated directly by changing the hardmask films under the EUV resist. The secondary electrons are thus avoided, and a better resolution can be achieved (although at necessarily higher doses).
In addition to the type of hardmask that sits beneath the EUV photoresist, another key challenge is the thickness of these materials. As traditional spin-on trilayer films are thinned down to handle EUV-compatible dimensions, we have found that embedded film defectivity becomes more prevalent. This phenomenon is not seen with inorganic films that are based on either chemical vapor deposition or atomic layer deposition.8 Although this is not necessarily a fundamental roadblock to the use of spin-on materials, it does represent an important engineering challenge that needs to be overcome. Fortunately, because EUV does not have the same reflectivity control requirements as 193i (or larger) wavelengths, this challenge represents an opportunity to implement novel patterning materials or processes.
Without the need for reflectivity control films, we can envision a path to patterning EUV photoresists directly onto thin inorganic hardmask films. The main challenge then becomes management of the interface between the hardmask films and the photoresist, i.e., to avoid either photoresist pattern footing or pattern liftoff/collapse. We have found that aggressive vapor priming of an oxide surface does not improve adhesion sufficiently to support <30nm pitch imaging.8 It is therefore necessary to engineer the hardmask itself with hydrophobic surface properties in mind. Alternatively, novel surface modification techniques need to be developed so that the process simplification potentially presented by EUV can be realized.
In summary, the viability of EUV as a patterning technique continues to accelerate. As the industry enters the yield-learning phase, however, we face challenges and opportunities that did not exist with 193i-based patterning. As we look forward, we will continue to demonstrate the manufacturability of the EUV lithography ecosystem. We are also being forced to search for the right type and combination of under-layer materials that can support imaging and pattern transfer at line/space pitches of less than 30nm. In addition, we are looking at innovative materials that we can use to improve the hardmask/resist interface for pattern transfer simplicity.
We especially acknowledge Dan Corliss for his contributions and for reviewing the content of this work.
Nelson Felix obtained his PhD in chemical engineering from Cornell University in 2007, where some of his research involved the study of the fundamentals of EUV resist processing. He joined IBM in 2008, and is currently the manager of 193i and EUV lithography enablement for semiconductor technology research.