Photolithographic fabrication of a silica-clad photonic-crystal nanocavity
Silicon photonics is a field in which electrical wiring is replaced by photonic waveguides. This optical approach enables the parasitic capacitance of circuits to be reduced and is therefore a promising candidate for reducing the energy consumption in system-on-chip devices. Additionally, using silicon allows engineers to take advantage of the mature fabrication techniques that have been developed using CMOS technologies.
Recent advances in the field of silicon photonics have enabled us to mount various passive and active devices on a silicon chip.1 However, due to the requirement for stronger light confinement and increased functionality, on-chip all-optical signal processing is yet to be achieved. Photonic crystal (PhC) technologies may provide a route toward this. A PhC system could provide an ultra-high-quality-factor (Q) nanocavity, enabling light to be trapped in a very tiny space (∼0.18μm3).2, 3 Various devices that implement PhCs have already been demonstrated, including low-power optical bistable devices, all-silicon detectors, and low-power silicon Raman lasers. Further fusion of PhC technologies with silicon photonics could enable the integration of a variety of novel components on a silicon chip.4, 5 However, fusion of the two technologies remains a challenge for two reasons. First, different fabrication methods are required. A PhC nanocavity requires a high-precision structure, necessitating the use of electron beam (EB) lithography. On the other hand, silicon photonics devices are often fabricated by photolithography because the technique is inexpensive, compatible with existing CMOS devices, and suitable for mass production. A high Q must therefore be achieved in a PhC nanocavity fabricated via photolithography. Second, devices fabricated using these technologies have different structures. High-Q PhC nanocavities have an air-bridge structure. To obtain the high refractive-index contrast that is enabled by this structure—between the core (silicon) and the cladding (air)—the underlying silicon dioxide (SiO2) cladding is removed using a wet-etching process. The resulting structure reduces the out-of-slab radiation, thereby enabling a high Q. However, silicon photonics devices require an SiO2 cladding to achieve stability.
We have recently shown that by choosing a suitable design, a high Q can be obtained in a nanocavity that is fabricated photolithographically and clad with SiO2.1 The key to achieving this is to use a width-modulated line defect. This design, which was originally developed by Kuramochi and coworkers, has been shown to have an ultra-high Q when air clad.6 However, by adding a small perturbation to the mode-gap frequency of a PhC waveguide, light can be localized. This enables an ultra-high Q (∼7.1×106) to be achieved when the device is clad with SiO2. Additionally, the structure offers high robustness against the proximity effect—which can arise as a result of unwanted UV diffraction during the fabrication of devices with varying patterns—due to its uniformity.
To introduce a line defect, the position of some of the holes in the PhC are shifted by a few nanometers. Perhaps nonintuitively, high-precision fabrication is not required for this purpose. When fabricating a structure that is nonuniform, extra attention and considerable effort must be employed to compensate for the local proximity effect that occurs during lithography. In contrast, this effect does not occur in uniform structures. Because the resolution of photolithographic fabrication is lower than that of EB lithography, the tolerance of these devices to the proximity effect is significant.
Figure 1(a) shows a scanning-electron-microscope image of the fabricated device. Because the structure is fairly uniform, the maximum hole-shift distance is 9nm. To examine the influence of the proximity effect, we also fabricated a different type of PhC nanocavity (an L3 nanocavity: a line of three missing holes) on the same chip. We found that, as a result of the effect, the cavity structure of the device is incorrectly formed when the optimum positional shift (i.e., the shift that enables the highest Q, 63nm) is implemented: see Figure 1(b). If a robust design is used, however, a high-Q PhC cavity could be fabricated via photolithography. Figure 2 shows the measured transmission spectrum of the cavity shown in Figure 1(a). By coupling light to a PhC nanocavity using an in-plane silicon nanowire, we obtained a Q of 2.2×105. This value, calculated from the linewidth of the transmittance spectrum, represents the highest demonstrated Q value for a photolithographically fabricated PhC nanocavity. Significantly, this cavity is clad with SiO2and could therefore be used in the fabrication of all-silicon photodetectors,7 sub-microwatt Raman sources,8 and novel functional cavity devices.9
We have also demonstrated that, in addition to enabling the integration with other silicon photonics devices, SiO2 cladding leads to enhanced thermal properties through in-plane heat diffusion. Additionally, the SiO2-clad structure allows heat to diffuse in the vertical direction, resulting in a 4.2-fold suppression of the thermo-optic effect. This behavior makes our device attractive for use in active devices such as all-optical switches.
We have demonstrated that a high Q of 2.2×105 can be achieved with a photolithographically fabricated PhC nanocavity clad with SiO2. This cladding provides mechanical robustness and enhanced thermal features. In our future work, we will focus on integrating the PhC nanocavity fully with other silicon photonics components, such as silicon-wire waveguide-based electro-optic modulators and detectors. Integration such as this could pave the way toward the true fusion of PhC technology with silicon photonics, and enable the realization of all-optical signal processing on a chip.
Takasumi Tanabe received his PhD from Keio University in March 2004 and subsequently joined NTT Basic Research Laboratories, NTT Corporation, in Atsugi, Japan. He received the Scientific American 50 Award in 2007 and returned to Keio University in 2010, where he is currently an associate professor.