Automated design of large-scale photonic integrated circuits

A new platform offers scalable, circuit-level simulation techniques capable of modeling electronic, optoelectronic, and photonic devices on the same circuit and enabling an automated design process.
23 June 2015
André Richter, Sergei Mingaleev, and Igor Koltchanov

Photonic integrated circuits (PICs) use light to perform computational, transmission, and signal processing functions primarily for fiber-optic communications. Other applications include biomedicine, photonic computing, and sensing. PICs have seen a dramatic increase in complexity in recent years, with the number of photonic components integrated on a single chip rapidly approaching the order of 1000.1 Microelectronics reached this level of integration more than 40 years ago with the emergence of the first analysis programs for electronic circuits (ECs).2 In a similar way, software tools enabling the automated design process for large-scale PICs are now an important prerequisite for increasing the number of integrated elements per chip.3–6Fabrication processes that use a high level of diverse functions enable more compact, cost-efficient, and higher-performing optical systems than those using discrete optical components. Furthermore, the integration of photonic and electronic circuits offers the potential for even greater functionality.

Purchase SPIE Field Guide to Optical Fiber TechnologyTraditional photonic device simulators apply direct methods to solve Maxwell's equations for the complete structure. By contrast, photonic circuit simulators are based on segmentation of the modeled PIC into building blocks (BBs). Each BB is a photonic device coupled to other BBs by guided modes of optical waveguides. This enables separation of circuit-level modeling of PICs from device-level modeling of photonic elements. Importantly, BBs can be modeled by various methods, thus allowing for initial rapid prototyping of the circuit and subsequent gradual improvement of the simulation accuracy.

Ideally, the design framework for large-scale PICs should resemble that developed for ECs. However, PICs' greater complexity makes the task of photonic design automation (PDA) very challenging.

One issue is the diversity and structure of PIC BBs. Compared with the models of optoelectronic and advanced photonic devices, even complicated electronic components are described by very simple models. The complexity of photonic BBs requires the support of several simulation models, ranging from idealized fast (a few seconds or less) to fully realistic, measured, and highly customizable models. Support of realistic BB models requires seamless integration between circuit-level and device-level simulators. Moreover, it is necessary to use advanced parameter scripting (defining parameter values by computer script) to support large-scale integration.

Furthermore, photonic circuit simulators need to support sophisticated signal models. BBs of ECs are interconnected by electrical wires, each described by voltage and current. PICs contain, in addition, optoelectronic and photonic devices with optical ports coupled to each other by optical signals, which are described by complex-valued envelope amplitudes for the forward- and backward-propagating modes. To support several communication channels at different carrier frequencies would require different envelope amplitudes for each of these channels. Such sophisticated signal models do not allow for extension of existing electronic circuit simulators based on SPICE (Simulation Program with Integrated Circuit Emphasis).7, 8

A further complication is the large variation in BB sizes, which range from submicrons (waveguide junctions, electronic components) requiring very small time steps when modeled in time domain, to several centimeters (delay lines) introducing long signal delays and thus requiring long simulation times. Special approaches are needed for efficient modeling of spatially distributed tapered and dynamically tunable devices.

Consequently, designers require new scalable (fast and accurate) circuit-level simulation methods capable of modeling electronic, optoelectronic, and photonic devices on the same circuit. We have developed and integrated several such techniques into one simulation framework.9

Figure 1 shows a schematic representation of the structural organization of our circuit simulator,2 depicting the core functionality (component models, simulation domains) in the center surrounded by other important parts of an automated design framework (user interface, simulation control, optimization and analysis capabilities) and interface options to external simulators and design libraries.

Figure 1. Organization of VPIcomponentMaker Photonic Circuits, a circuit simulator addressing the complex requirements of an automated design framework for integrated photonic and optoelectronic circuits. TLM: Transmission line model. IIR: Infinite impulse response. FIR: Finite impulse response. S-Matrix: Scattering matrix. CPU: Central processing unit.

Support of process design kits (PDKs) for generic foundries of integrated photonics is key to enabling easy fabrication of the designed circuit. We base our work on the PDAFlow application programming interface,10 which is designed to link different photonic simulation and design automation tools. As an example, Figure 2 shows the circuit design for an integrated transmitter and receiver PIC for THz applications based on the generic integration technology developed at the Fraunhofer Heinrich Hertz Institute (HHI). This design is based on specialized BBs from the HHI PDK toolkit library, developed for our VPIcomponentMaker Photonic Circuits. Once the design is complete and the circuit optimized, we can export it to PhoeniX OptoDesigner11 to fit it to the die package, add proper electrical wire routing, perform design-rule-check verification, and export the final GDSII mask (the industry standard format) for optical chip fabrication.

Figure 2. Photonic integrated circuits (PICs) for THz generation and detection. The photonic circuit design, constructed in VPIcomponentMaker Photonic Circuits using specialized building blocks adhering to the process design kit (PDK) of the Fraunhofer Heinrich-Hertz Institute (HHI) foundry (top), is exported for layout design in PhoeniX OptoDesigner (bottom). SOA: Semiconductor optical amplifier. BJ: Butt joint. PM.CI: Current-injection phase modulator.

The major challenges in achieving an automated design framework for large-scale and heterogeneously integrated circuits are the photonic-electronic co-design,12 and the seamless integration of circuit and layout design. We believe that because of the complexity of photonic circuits in comparison with electronic ones, it will not be possible to extend electronic design automation (EDA) tools. Very soon designers will regard integrated electronics as a subset of integrated photonics, which will raise challenges for established EDA tools, despite their maturity. Future work will focus on integrating new versatile and comprehensive PDA tools with EDA methods to offer a complete automated design framework for large-scale heterogeneous integrated circuits.

André Richter, Igor Koltchanov
Berlin, Germany
Sergei Mingaleev
VPI Development Center
Minsk, Belarus

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3. VPIcomponentMaker Photonic Circuits. Accessed 22 May 2015.
4. ASPIC. Accessed 5 June 2015.
5. PICWave. Accessed 5 June 2015.
6. INTERCONNECT. Accessed 5 June 2015.
7. L. W Nagel, D. O. Pederson, Simulation Program with Integrated Circuit Emphasis (SPICE).
8. L. W. Nagel, D. O. Pederson, SPICE (Simulation Program with Integrated Circuit Emphasis), Memorandum ERL-M382, Electronics Research Laboratory, College of Engineering, University of California, Berkeley, 1973.
9. S. Mingaleev, A. Richter, E. Sokolov, C. Arellano, I. Koltchanov, Towards an automated design framework for large-scale photonic integrated circuits, Proc. SPIE 9516, p. 951602, 2015. doi:10.1117/12.2182230
10. PDAFlow API, developed by the PDAFlow Foundation. Accessed 22 May 2015.
12. W. Bogaerts, M. Fiers, P. Dumon, Design challenges in silicon photonics, IEEE J. Sel. Top. Quant. Electron. 20(4), p. 1-8, 2014.
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