Single exposure lithography is the most cost effective means of achieving critical level exposures, and extreme ultraviolet lithography (EUVL) is the technology that will enable this for 27nm production and below. ASML is actively engaged in the development of a multi generation production EUVL system platform that builds on TWINSCAN^TM technology and the designs and experience gained from the build, maintenance, and use of the Alpha Demo Tools (ADTs). The ADTs are full field step-and-scan exposure systems for EUVL and are being used at two research centers for EUVL process development by more than 10 of the major semiconductor chip makers, along with all major suppliers of masks and resist. In this paper, we will present our EUVL roadmap, and the manufacturing status of the projection lens for our first production system. Included will also be some test data on the new reticle pods. Experimental results from ADT showing the progress in imaging (28 nm half pitch 1:1 lines/spaces CDU ~10%), single machine overlay down to 3 nm, and resist complete the paper.

Laser produced plasma (LPP) systems have been developed as a viable approach for the EUV scanner light source for optical imaging of circuit features at sub-32nm and beyond nodes on the ITRS roadmap. This paper provides a review of development progress and productization status for LPP extreme-ultra-violet (EUV) sources with performance goals targeted to meet specific requirements from leading scanner manufacturers. We present the latest results on power generation, stable and efficient collection, and clean transmission of EUV light through the intermediate focus. We report on measurements taken using a 5sr collector optic on a production system. Power transmitted to intermediate focus (IF) is shown. The lifetime of the collector mirror is a critical parameter in the development of extreme ultraviolet LPP lithography sources. Deposition of target material as well as sputtering of the multilayer coating or implantation of incident particles can reduce the reflectivity of the mirror coating during exposure. Debris mitigation techniques are used to inhibit damage from occuring, the results of these techniques are shown. We also report on the fabrication of 5sr collectors and MLM coating reflectivity, and on Sn droplet generators with droplet size down to 30μm diameter.

On the road to insertion of extreme ultraviolet (EUV) lithography into production at the 16 nm technology node and below, we are testing its integration into standard semiconductor process flows for 22 nm node devices. In this paper, we describe the patterning of two levels of a 22 nm node test chip using single-exposure EUV lithography; the other layers of the test chip were patterned using 193 nm immersion lithography. We designed a full-field EUV mask for contact and first interconnect levels using rule-based corrections to compensate for the EUV specific effects of mask shadowing and imaging system flare. The resulting mask and the 0.25-NA EUV scanner utilized for the EUV lithography steps were found to provide more than adequate patterning performance for the 22 nm node devices. The CD uniformity across the exposure field and through a lot of wafers was approximately 6.1% (3σ) and the measured overlay on a representative test chip wafer was 13.0 nm (x) and 12.2 nm (y). A trilayer resist process that provided ample process latitude and sufficient etch selectivity for pattern transfer was utilized to pattern the contact and first interconnect levels. The etch recipes provided good CD control, profiles and end-point discrimination. The patterned integration wafers have been processed through metal deposition and polish at the contact level and are now being patterned at the first interconnect level.

Memristors were vertically integrated with CMOS circuits using nanoimprint lithography (NIL), making a transistor/memeristor hybrid circuit. Several planarization technologies were developed for the CMOS substrates to meet the surface planarity requirement for NIL. Accordingly, different integration schemes were developed and optimized. UV-curable NIL (UV-NIL) using a double layer spin-on resists was carried out to pattern the electrodes for memristors. This is the first demonstration of NIL on active CMOS substrates that are fabricated in a CMOS fab. Our work demonstrates that NIL is compatible with commercial IC fabrication process. It was also demonstrated that the memristors are integratable with traditional CMOS to make hybrid circuits without changing the current infrastructure in IC industry.

REBL (Reflective Electron Beam Lithography) is being developed for high throughput electron beam direct write maskless lithography. The system is specifically targeting 5 to 7 wafer levels per hour throughput on average at the 45 nm node, with extendibility to the 32 nm node and beyond. REBL incorporates a number of novel technologies to generate and expose lithographic patterns at estimated throughputs considerably higher than electron beam lithography has been able to achieve as yet. A patented reflective electron optic concept enables the unique approach utilized for the Digital Pattern Generator (DPG). The DPG is a CMOS ASIC chip with an array of small, independently controllable cells or pixels, which act as an array of electron mirrors. In this way, the system is capable of generating the pattern to be written using massively parallel exposure by ~1 million beams at extremely high data rates (~ 1Tbps). A rotary stage concept using a rotating platen carrying multiple wafers optimizes the writing strategy of the DPG to achieve the capability of high throughput for sparse pattern wafer levels. The exposure method utilized by the DPG was emulated on a Vistec VB-6 in order to validate the gray level exposure method used in REBL. Results of these exposure tests are discussed.

We are developing a CO₂ laser driven Tin plasma EUV source for HVM EUVL. This approach enables cost-effective EUV power scaling by high-conversion efficiency and full recovery of Tin fuel. The RF-excited, multi 10 kW average power pulsed CO₂ laser system is a MOPA (master oscillator power amplifier) configuration and operates at 100 kHz with 20 ns pulse width. The EUV light source is scalable to in-band 200 W IF power with a single 20-kW CO₂ laser beam. EUV chamber is kept uncontaminated by using a small size droplet target and effective Tin exhaust by magnetic plasma guiding. Characterization of the plasma flow in uniform magnetic field was studied by monitoring the motion of Tin plasma stream in a large vacuum chamber, depending on the magnetic flux up to 2 T. Topics relevant for HVM source is reported on continuous operation and Tin vapor evacuation.

The learning gained in previous developments for EUV Micro Exposure and Alpha Tools builds the basis for the EUVL source development at XTREME technologies and Philips EUV. Field data available from operation of these tools are in use for continuous improvements in core technology areas such as plasma generation and forming, component reliability, debris mitigation and optical performance. Results from integration and operation of alpha tool sources are presented in the areas power performance, component lifetime and debris mitigation efficiency. The analysis results and simulation work of the realized EUV source concept are discussed and innovative concepts for component and module improvements are introduced. The technological limit for the Xenon based sources seems to be reached on alpha performance level. Therefore the next EUV source generations are based on Tin to increase the efficiency and full performance of those sources. For the Betatool and HVM source generations a joint development work between XTREME technologies and Philips EUV is introduced. The related work is content of another presentation of this conference.

The power roadmap for EUVL high volume manufacturing (HVM) exceeds the 200W EUV in-band power at intermediate focus, thus posing more demanding requirements on HVM sources, debris suppression systems and collectors. Starting from the lessons learned in the design and fabrication of the grazing incidence collectors for the Alpha EUVL scanners, Media Lario Technologies is developing HVM optical solutions that enable designed-in lifetime improvements, such as larger source-collector distances, optimized collection efficiency through larger collected solid angles, and customized EUV reflective layers. The optical design of an HVM collector is described together with the selection of the sacrificial ruthenium reflective layer. The water cooling layout of the collector is evolved from the integrated cooling technology developed at Alpha level into an innovative cooling layout that minimizes the thermal gradients across the mirrors and allows controlling the optical performance at the far-field plane. Finally, the evolution of the collector's manufacturing technologies for HVM is discussed. XTREME technologies and Philips Extreme UV support this work by integrating the collector in the complete source collector module (SoCoMo). At system level, each component of the SoCoMo is part of a development and improvement plan leading to a comprehensive system that will fulfill the 200+ W EUV in-band power at intermediate focus.

Phase-shifting EUVL masks applying thinner absorber are investigated to design optimum mask structure with less shadowing problems. Simulations using S-Litho show that H-V bias in Si capping structure is higher than that of Ru capping since the high n (= 0.999) of Si increases sensible absorber height. Phase differences obtained from the patterned masks using the EUV CSM are well-matched with the calculated values using the practical refractive index of absorber materials. Although the mask with 62.4-nm-thick absorber, among the in-house masks, shows the closest phase ΔΦ(= 176°) to the out-of-phase condition, higher NILS and contrast as well as lower H-V bias are obtained with 52.4-nm-thick absorber (ΔΦ = 151°) which has higher R/R0 ratio. MET results also show that lithography performances including MEEF, PW, and resist threshold (dose), are improved with thinner absorber structure. However, low OD in EUVL mask, especially in thinner absorber structure, results in light leakage from the neighboring exposure shots, and thus an appropriate light-shielding layer should be introduced.

Defect smoothing is a critical need for improving defects. There are different methods such as using a smoothing layer or multilayer deposition; however, smoothing processes tend to add defects of their own to the surface. This paper presents a novel pit smoothing method based on an anisotropic substrate etch process. Smoothing power is defined as a metric for comparing the smoothing capability of different smoothing processes. Defect smoothing by cleaning is a surface modification technique with a smoothing power <10 that does not add defects to the surface. This is demonstrated by comparing total defects on the mask blank and mask blank substrate for two processes: a standard ozone-based cleaning and a smoothing cleaning. The smooth/clean methods led to fewer defects on the blank and substrate surfaces than the standard clean while still meeting extreme ultraviolet (EUV) blank roughness requirements. Finally, it is shown that smoothed pits are still printable. Therefore, further improvements to the smoothing power of smooth/clean processes are needed. SEMATECH is currently working to improve smooth/clean processes for low thermal expansion material (LTEM) EUV substrates.

EUV blank non-flatness results in both out of plane distortion (OPD) and in-plane distortion (IPD) [3-5]. Even for extremely flat masks (~50 nm peak to valley (PV)), the overlay error is estimated to be greater than the allocation in the overlay budget. In addition, due to multilayer and other thin film induced stresses, EUV masks have severe bow (~1 um PV). Since there is no electrostatic chuck to flatten the mask during the e-beam write step, EUV masks are written in a bent state that can result in ~15 nm of overlay error. In this article we present the use of physically-based models of mask bending and non-flatness induced overlay errors, to compensate for pattern placement of EUV masks during the e-beam write step in a process we refer to as E-beam Writer based Overlay error Correction (EWOC). This work could result in less restrictive tolerances for the mask blank non-flatness specs which in turn would result in less blank defects.

The successful implementation of extreme ultraviolet lithography (EUVL) requires the use of an electrostatic chuck to both support and flatten the mask during scanning exposure. The EUVL Mask Standard, SEMI P37, specifies the nonflatness of the mask frontside and backside, as well as the thickness variation, to be 30 nm to 100 nm peak-to-valley, dependent on the class of substrate. Thus, characterizing and predicting the capability of the electrostatic chuck to reduce mask nonflatness to meet these specifications are critical issues. In this research, the ability of such chucks to deal with the presence of particles trapped between the substrate and chuck is investigated. Analytical and finite element modeling have been used to identify the forces needed to fully embed or deform a particle during electrostatic chucking. Simulation results (using an elastic analysis) have shown that the forces generated by both Coulomb and Johnsen-Rahbek chucks should be able to sufficiently deform, or flatten, particles which are nearly 1.0 μm in size.

For successful implementation of extreme ultraviolet lithography (EUVL) technology for late cycle insertion at 32 nm half-pitch (hp) and full introduction for 22 nm hp high volume production, the mask development infrastructure must be in place by 2010. The central element of the mask infrastructure is contamination-free reticle handling and protection. Today, the industry has already developed and balloted an EUV pod standard for shipping, transporting, transferring, and storing EUV masks. We have previously demonstrated that the EUV pod reticle handling method represents the best approach in meeting EUVL high volume production requirements, based on then state-of-the-art inspection capability at ~53nm polystyrene latex (PSL) equivalent sensitivity. In this paper, we will present our latest data to show defect-free reticle handling is achievable down to 40 nm particle sizes, using the same EUV pod carriers as in the previous study and the recently established world's most advanced defect inspection capability of ~40 nm SiO₂ equivalent sensitivity. The EUV pod is a worthy solution to meet EUVL pilot line and pre-production exposure tool development requirements. We will also discuss the technical challenges facing the industry in refining the EUV pod solution to meet 22 nm hp EUVL production requirements and beyond.

Due to the ever-increasing cost of equipment and mask complexity, the use of optical lithography for integrated circuit manufacturing is increasingly more complex and expensive. Recent workshops and conferences in semiconductor lithography underlined that one alternative to support sub-32nm technologies is mask-less lithography option using electron beam technology. However, this direct write approach based on variable shaped beam principle (VSB) is not sufficient in terms of throughput, i.e. of productivity. New direct write techniques like multibeam systems are under development, but these solutions will not be mature before 2012. The use of character/cell projection (CP) on industrial VSB tools is the first step to deal with the throughput concerns. This paper presents the status of the CP technology and evaluates its possible use for the 45nm and 32nm logic nodes. It will present standard cell and SRAM structures that are printed as single characters using the CP technique. All experiments are done using the Advantest tool (F3000) which can project up to 100 different cells per layer. Cell extractions and design have been performed with the design and software solution developed by D2S. In this paper, we first evaluate the performance gain that can be obtained with the CP approach compared to the standard VSB approach. This paper also details the patterning capability obtained by using the CP concept. An evaluation of the CD uniformity and process stability is also presented. Finally this paper discusses about the improvements of this technique to address high resolution and to improve the throughput concerns.

We propose a character size optimization technique to enhance throughput of multi-column-cell (MCC) lithographic systems in which transistor patterns are projected with multiple column cells in parallel. Each and every column cell is capable of projecting patterns with character projection (CP) and variable shaped beam (VSB) methods. Seeking the optimal character size of characters contributes to minimizing the number of EB shots and reducing the fabrication cost for ICs. Experimental results show that the character size optimization technique reduced 70.6% of EB shots in the best case with an available electron beam size.

Projection Mask-Less Lithography (PML2) is a potentially cost-effective multi electron-beam solution for the 22 nm half-pitch node and beyond. PML2 is targeted on using hundreds of thousands of individually addressable electron-beams working in parallel, thereby pushing the potential throughput into the wafers per hour regime. With resolution potential of < 10 nm, PML2 is designed to meet the requirements of several upcoming tool generations.

Maskless electron beam lithography, or electron beam direct write, has been around for a long time in the semiconductor industry and was pioneered from the mid-1960s onwards. This technique has been used for mask writing applications as well as device engineering and in some cases chip manufacturing. However because of its relatively low throughput compared to optical lithography, electron beam lithography has never been the mainstream lithography technology. To extend optical lithography double patterning, as a bridging technology, and EUV lithography are currently explored. Irrespective of the technical viability of both approaches, one thing seems clear. They will be expensive [1]. MAPPER Lithography is developing a maskless lithography technology based on massively-parallel electron-beam writing with high speed optical data transport for switching the electron beams. In this way optical columns can be made with a throughput of 10-20 wafers per hour. By clustering several of these columns together high throughputs can be realized in a small footprint. This enables a highly cost-competitive alternative to double patterning and EUV alternatives. In 2007 MAPPER obtained its Proof of Lithography milestone by exposing in its Demonstrator 45 nm half pitch structures with 110 electron beams in parallel, where all the beams where individually switched on and off [2]. In 2008 MAPPER has taken a next step in its development by building several tools. The objective of building these tools is to involve semiconductor companies to be able to verify tool performance in their own environment. To enable this, the tools will have a 300 mm wafer stage in addition to a 110-beam optics column. First exposures at 45 nm half pitch resolution have been performed and analyzed. On the same wafer it is observed that all beams print and based on analysis of 11 beams the CD for the different patterns is within 2.2 nm from target and the CD uniformity for the different patterns is better than 2.8 nm.

This paper describes a new multi beam approach in electron beam lithography called Multi Shaped Beam (MSB). Based on the well known Variable Shaped Beam (VSB) principle, the single shaped beam arrangement is extended and complemented by an array of individually controlled shaped beams. The positive effect of the MSB approach on resolution limiting stochastic beam blur due to Coulomb interactions will be highlighted applying detailed electron-optical Monte-Carlo simulations. To verify the feasibility of the above-mentioned new approach, there is also depicted a proof-of-lithography test stand based on a complete e-beam-lithography system containing MSB-specific hardware and software components.

E-beam Maskless activities raised a lot of interest in the past years from semiconductor companies strongly concerned by the constant cost increase of masked-based lithography (1). Beginning of 2008, the European Commission started an integrated program called "MAGIC", Maskless lithography for IC manufacturing, which pushes the development and the insertion of the European multi-beam technology (2) in the semiconductor industry. This project supports also to develop the infrastructure for the use of this technology, including resist processes, data processing and proximity corrections. Within MAGIC, MAPPER develops its low energy (5keV) massively parallel concept (3). Compared to a standard single E-Beam machine working classically at 50kV, this low accelerating voltage requires the use of thin resist film to deal with the lower penetration depth of the electrons. This paper presents the resist development status, including Chemically Amplified Resist and non-CAR platforms. Comparisons of the performances of these resist platforms in terms of resolution, sensitivity, roughness and stability are detailed, including their potential integration into CMOS technological flow. Finally, a first review of the state of the art of resist performance for patterning at 5kV will be performed. Based on the level of achievements presented in this paper, a discussion is also engaged about the needs of resist developments to fulfill industry targets in 2011.

Extreme Ultra-Violet (EUV) lithography is the leading candidate for semiconductor manufacturing of the 22nm technology node and beyond, due to the very short wavelength of 13.5nm. However, reducing the wavelength adds complexity to the lithographic process. The impact of the EUV specific conditions on lithographic performance needs to be understood, before bringing EUV lithography into pre-production. To provide early learning on EUV, an EUV fullfield scanner, the Alpha Demo Tool (ADT) from ASML was installed at IMEC, using a Numerical Aperture (NA) of 0.25. In this paper we report on different aspects of the ADT: the imaging and overlay performance and both short and long-term stability. For 40nm dense Lines-Spaces (LS), the ADT shows an across field overlapping process window of 270nm Depth Of Focus (DOF) at 10% Exposure Latitude (EL) and a wafer CD Uniformity (CDU) of 3nm 3σ, without any corrections for process or reticle. The wafer CDU is correlated to different factors that are known to influence the CD fingerprint from traditional lithography: slit intensity uniformity, focus plane deviation and reticle CD error. Taking these contributions into account, the CD through slit fingerprint for 40nm LS is simulated with excellent agreement to experimental data. The ADT shows good CD stability over 9 months of operation, both intrafield and across wafer. The projection optics reflectivity has not degraded over 9 months. Measured overlay performance with respect to a dry tool shows |Mean|+3σ below 20nm with more correction potential by applying field-by-field corrections (|Mean|+3σ ≤10nm). For 22nm SRAM application, both contact hole and metal layer were printed in EUV with 10% CD and 15nm overlay control. Below 40nm, the ADT shows good wafer CDU for 30nm dense and isolated lines (on the same wafer) and 38nm dense Contact Holes (CH). First 28nm dense line CDU data are achieved. The results indicate that the ADT can be used effectively for EUV process development before installation of the pre-production tool, the ASML NXE Gen. 1 at IMEC.

EUV lithography is one of the most promising methods for next-generation lithography below 22 nm half pitch. However, critical issues such as availability of a clean powerful source, resist resolution and sensitivity, and defect-free masks have yet to be overcome. Flare is one of the key issues for EUV lithography critical dimension (CD) control.¹ The cause of flare is scattered light due to the surface roughness of the mirrors in the projection optics. Mirror surface control techniques have reached the angstrom level and are approaching physical limits. Therefore, it is important to understand and evaluate "actual" flare and begin developing a mitigation strategy. In this paper, we report on two evaluations of short-range flare using the ASML Alpha Demo Tool (ADT) in Albany, NY.² First, a series of donut shaped patterns of varying size are evaluated in order to determine the impact of flare on the imaging of a central post surrounded by a clear annulus. A spillover parameter is used to estimate the ADT flare point spread function. The results, which show roughly a slope of -1 on a log-log plot, are in agreement with those expected from the power spectral density (PSD) due to mirror surface roughness. Second, an investigation into out-of-band (OoB) radiation was performed, which leverages OoB reflection from the ADT's reticle masking (REMA) blades. We estimate that the amount of OoB radiation is on the order of 3 to 4 percent of the EUV light.

Microfield exposure tools (METs) continue to play a dominant role in the development of extreme ultraviolet (EUV) resists. One of these tools is the SEMATECH Berkeley 0.3-NA MET operating as a SEMATECH resist and mask test center. Here we present an update summarizing the latest resist test and characterization results. The relatively small numerical aperture and limited illumination settings expected from 1st generation EUV production tools make resist resolution a critical issue even at the 32-nm node. In this presentation, sub 22 nm half pitch imaging results of EUV resists are reported. We also present contact hole printing at the 30-nm level. Although resist development has progressed relatively well in the areas of resolution and sensitivity, line-edge-roughness (LER) remains a significant concern. Here we present a summary of recent LER performance results and consider the effect of system-level contributors to the LER observed from the SEMATECH Berkeley microfield tool.

For the commercialization of extreme ultraviolet lithography (EUVL), discharge or laser produced, pulsed plasma light sources are being considered. These sources are known to emit into a broad range of wavelengths that are collectively referred to as the out-of-band (OOB) radiation by lithographers. Multilayer EUV optics reflect OOB radiation emitted by the EUV sources onto the wafer plane resulting in unwanted background exposure of the resist (flare) and reduced image contrast. The reflectivity of multilayer optics at the target wavelength of 13.5 nm is comparable to that of their reflectivity in the deep ultraviolet (DUV) and UV regions from 100-350 nm. The aromatic molecular backbones of many of the resists used for EUV are equally absorptive at specific DUV wavelengths as well. In order to study the effect of these wavelengths on imaging performance in a real system, we are in the process of integrating a DUV source into the SEMATECH Berkeley 0.3-NA Microfield Exposure Tool (MET). The MET plays an active role in advanced research in resist and mask development for EUVL and as such, we will utilize this system to systematically evaluate the imaging impact of DUV wavelengths in a EUV system. In this paper, we present the optical design for the new DUV component and the simulation-based imaging results predicting the potential impact of OOB based on known resist, mask, and multilayer conditions. It should be noted that because the projection optics work equally well as imaging optics at DUV wavelengths, the OOB radiation cannot be treated simply as uniform background or DC flare.

The cost of ownership (CoO) of candidate technologies for 22 nm half-pitch lithography is calculated. To more accurately compare technologies with different numbers of process steps, a model that includes deposition, etching, metrology, and other costs is created. For 22 nm half-pitch nodes, extreme ultraviolet lithography (EUVL) has a significant cost advantage over other technologies under certain mask cost assumptions. Double patterning, however, may be competitive under worst-case EUVL mask cost assumptions. Sensitivity studies of EUVL CoO to throughput and uptime show EUVL may be cost-competitive at lower uptime and throughput conditions. Finally, calculation of the CoO of 450 mm lithography shows that the expected cost reduction is between 0% and 15%.

Our aim is to characterize the surface processes that affect the reflectivity of TiO₂ - capped multilayer mirrors used in EUV lithography. Low energy electron beam is employed to mimic excitations initiated by EUV radiation. Temperature programmed desorption (TPD), x-ray photoelectron spectroscopy (XPS), and low energy ion scattering (LEIS) are used to analyze the surface reactions. Carbon film growth on the TiO₂ (011) crystalline surface is measured during 10 to 100 eV electron bombardment in benzene or methyl methacrylate (MMA) vapor over a wide range of pressures and temperatures near 300 K. Low energy secondary electrons excited by EUV photons contribute substantially to carbon accumulation on clean TiO₂ cap layers. For benzene on clean TiO₂ secondary electron effects dominate in the initial stages of carbon accumulation, whereas for C-covered TiO₂, direct photoexcitations appear to dominate. The adsorption energy, the steady-state coverage of the molecules on the surface and the cross-sections for electron-stimulated dissociation are key parameters for understanding and modeling the processes on the EUVL mirrors.

Optics in EUVL exposure tools are known to suffer reflectivity degradation, mostly from the buildup of carbon. The sources of this carbon have been difficult to identify. The vacuum cleanliness in the preproduction micro-exposure tools is monitored with a residual gas analyzer, but they have not shown carbon-containing species in sufficient concentration to account for the observed carbon buildup seen in these tools. We have developed a technique based on cryo trapping followed by gas chromatography with mass spectrometry analysis that is more sensitive to less-volatile compounds. We will present sample data on typical vacuum systems as well as a preliminary analysis of the Intel micro-exposure tool.

The primary, publicly reported cause of optic degradation in pre-production extreme-ultraviolet (EUV) lithography systems is carbon deposition. This results when volatile organics adsorb onto optic surfaces and then are cracked by EUV-induced reactions. Hence the deposition rate depends on the adsorption-desorption kinetics of the molecule-surface system as well as the basic photon-stimulated reaction rates, both of which may vary significantly for different organic species. The goal of our ongoing optics-contamination program is to estimate the contamination rate of species expected in the tool environment by exposing samples to in-band 13.5 nm light from our synchrotron in the presence of fixed partial pressures of admitted gases. Here we report preliminary results of contamination rates on TiO₂-capped samples for species observed in resist-outgassing measurements (benzene, isobutene, toluene and tert-butylbenzene) in the pressure range (10^-6 to 10^-4) Pa which all display an unexpected logarithmic dependence on pressure. This scaling is in agreement with previous EUV exposures of other species at NIST as well as independent measurements of coverage performed at Rutgers University. These results are consistent with a molecular desorption energy that decreases with coverage due to molecular interactions (Temkin model). Use of the proper scaling law is critical when estimating optic lifetimes by extrapolating over the 3-to-6 orders of magnitude between accelerated-testing and tool-environment partial pressures.

Extreme ultraviolet lithography (EUVL) is one of the leading candidates for next-generation lithography technology for the 32 nm half-pitch node and beyond. We have evaluated the Alpha Demo Tool(ADT) characterizing for mixed-andmatched overlay(MMO), flare noise, and resolution limit. For process integration, one of the important things in EUVL is overlay capability. We performed an overlay matching test of a 1.35NA and 193 immersion tool using a low thermal expansion material(LTEM) mask. We also investigated the flare level of the EUV ADT for device applications. The current EUV tool has a higher flare level than ArF lithography tools. We applied a contact layer for 40nm node device integration to reduce the variation in critical dimension(CD) from the flare noise.

In this paper, we will present comparison of DRAM cell patterning between ArF immersion and EUV lithography which will be the main stream of DRAM lithography. Assuming that the limit of ArF immersion single patterning is around 40nm half pitch, EUV technology is positioned on essential stage because development stage of device manufacturer is going down sub-40nm technology node. Currently lithography technology, in order to improve the limitation of ArF immersion lithography, double patterning technology (DPT) and spacer patterning technology (SPT) have been examined intensively. However, double patterning and spacer patterning technology are not cost-effective process because of complexity of lithography process such as many hard mask stacks and iterative litho, etch process. Therefore, lithography community is looking forward to improving maturity of EUVL technology. In order to overcome several issues on EUV technology, many studies are needed for device application. EUV technology is different characteristics with conventional optical lithography which are non-telecentricity and mask topography effect on printing performance. The printed feature of EUV is shifted and biased on the wafer because of oblique illumination of the mask. Consequently, target CD and pattern position are changed in accordance with pattern direction, pattern type and slit position of target pattern.1 For this study, we make sub-40nm DRAM mask for ArF immersion and EUV lithography. ArF attenuated PSM (Phase Shift Mask) and EUV mask (LTEM) are used for this experiment; those are made and developed by in-house captive maskshop. Simulation and experiment with 1.35NA ArF immersion scanner and 0.25NA EUV full field scanner are performed to characterize EUV lithography and to compare process margin of each DRAM cell. Two types of DRAM cell patterns are studied; one is an isolation pattern with a brick wall shape and another is a storage node pattern with contact hole shape. Line and space pattern is also studied through 24nm to 50nm half pitch for this experiment. Lithography simulation is done by in-house tool based on diffused aerial image model. EM-SUITE and Solid-EUV are also used in order to study characteristics of EUV patterning through rigorous EMF simulation. We also investigated shadowing effect according to pattern shape and design rule respectively. We find that vertical to horizontal bias is around 2nm on 32nm to 40nm half pitch line and space pattern. In the case of DRAM cell, we also find same result with line and space pattern. In view of mask-making consideration, we optimize absorber etch process. So we acquire vertical absorber profile and mask MTT(Mean To Target) within 10% of target CD through several pitch. Process windows and mask error enhancement factors are measured with respect to several DRAM cell pattern. In the case of one dimensional line and space and two dimensional brick wall pattern, vertical pattern shows the best performance through various pitches because of lower shadowing effect than horizontal pattern. But in case of contact hole DRAM cell pattern such as storage node pattern, it has bigger MEF value than one or two dimensional pattern because of independency of shadowing effect. Finally, we compare with 2x, 3x and 4x DRAM cell patterning performance in terms of pattern fidelity, slit CD uniformity and shadowing effect.

EUV lithography is considered one of the options for high volume manufacturing (HVM) of 16 nm MPU node devices [1]. The benefits of high k1(~0.5) imaging enable EUVL to simplify the patterning process and ease design rule restrictions. However, EUVL with its unique imaging process - reflective optics and masks, vacuum operation, and lack of pellicle, has several challenges to overcome before being qualified for production. Thus, it is important to demonstrate the capability to integrate EUVL into existing process flows and characterize issues which could hamper yield. A patterning demonstration of Intel's 32 nm test chips using the ADT at IMEC [7] is presented, This test chip was manufactured using processes initially developed with the Intel MET [2-4] as well as masks made by Intel's mask shop [5,6]. The 32 nm node test chips which had a pitch of 112.5 nm at the trench layer, were patterned on the ADT which resulted in a large k₁ factor of 1 and consequently, the trench process window was iso-focal with MEEF = 1. It was found that all mask defects detected by a mask pattern inspection tool printed on the wafer and that 90% of these originated from the substrate. We concluded that improvements are needed in mask defects, photospeed of the resist, overlay, and tool throughput of the tool to get better results to enable us to ultimately examine yield.

Reticle defectivity was evaluated using two known approaches: direct reticle inspection and the inspection of the wafer prints. The primary test vehicle was a reticle with a design consisting of 45 nm and 60 nm comb and serpentine structures in different orientations. The reticle was inspected in reflected light on the KLA 587 in a die-todie and a die-to-database mode. Wafers were exposed on a 0.25 NA full-field EUV exposure tool and inspected on a KLA 2800. Both methods delivered two populations of defects which were correlated to identify coinciding detections and mismatches. In addition, reticle defects were reviewed using scanning electron microscopy (SEM) to assess the printability. Furthermore, some images of the defects found on the 45 nm reticle used in the previous study [1] were collected using actinic (EUV) microscopy. The results of the observed mask defects are presented and discussed together with a defect classification.

The Selete full-field EUV exposure tool, the EUV1, was manufactured by Nikon and is being set up at Selete. Its lithographic performance was evaluated in exposure experiments with a static slit using line-&-space (L&S) patterns, Selete Standard Resist 03 (SSR3), an NA of 0.25, and conventional illumination (σ = 0.8). The results showed that 25- nm L&S patterns were resolved. Dynamic exposure experiments showed the resolution to be 45 nm across the exposure field and the CD uniformity across a shot to be 3 nm, also 26-nm L&S patterns were resolved. Overlay performance of the EUV1 was showed as processed wafer mark alignment, the repeatability was under 1nm. Overlay accuracy using EGA (Enhanced Global Alignment) was below 4nm at the 3-sigma after liner correction. These results were good enough for an alpha-level lithography tool and test site verification.

The EUV exposure tool settings and OPC strategies to be used for the 16 nm logic node are discussed. Imaging simulation was done for various types of CD through pitch patterns to investigate the tradeoff between NA, illumination settings, and resist diffusion blur. EUV optics still provides very good optical resolution at 56 nm min pitch, but resist diffusion degrades imaging contrast significantly. The CD variations due to resist blur are relatively larger for EUV lithography than they are for 193 nm lithography, because of the high quality of the EUV lithography images. EUV shadowing effect and flare effect contribute additional CD variations, which need to be corrected and controlled. Nonetheless, a resist blur of about 15 nm FWHM or better provides adequate imaging performance even with current EUV optical settings of 0.25 NA and conventional illumination for 28 nm half-pitch applications. Experimental results show that state-of-art EUV resists have resist blur values close to this requirement, although their current performance is limited by resist material properties and processing conditions.

Now that full-field alpha EUV scanners are available to lithographers at multiple sites around the world, there is greatly increased demand for full-field EUV circuit and teststructure wafer images. Successful patterning of these circuit and teststructure wafer images requires mask layout data which accurately compensates for all expected process transformations occurring in the EUV patterning process. These process transformations include flare, optical diffraction, resist behavior, mask shadowing, and 3D mask electromagnetic effects. In this paper, we present a complete fullfield EUV mask data correction flow which incorporates compensation for patterning transformations due to very long range flare, reflective multi-layer masks, thick mask absorbers, off-axis EUV scanner illumination, field-dependent shadowing and orientation dependent shadowing. Optimized algorithms for flare and mask effects now enable both fast and accurate full-chip process effect compensation. Results are shown for both the 22nm and 16nm logic device nodes. The results are presented by error component category to highlight the relative importance of each effect.

We derive an imaging budget from the performance of EUV optics with NA = 0.32, and demonstrate that the 22nm node requirements are met. Based on aerial image simulations, we analyze the impact of all relevant contributors, ranging from conventional quantities, like straylight or aberrations, to EUV-specific topics, namely influence of 3D mask effects and facetted illumination pupils. As test structures we consider dense to isolated lines, contact holes, and 2D elbows. We classify the contributions in a hierarchical order according to their weight in the CDU budget and identify the main drivers. The underlying physical mechanisms causing different contributions to be critical or less significant are clarified. Finally, we give an outlook for the 16nm and 11nm nodes. Future developments in optics manufacturing will keep the budgets controlled, thereby paving the way to enable printing of these upcoming nodes.

Various issues related to non-telecentric mask effects for EUV lithography will be discussed in this paper. First, a raytracing approach will provide a conceptual description as to the nature of non-telecentric thick mask effects, highlighting the behavior of various edge types and corners. Rigorous modeling of these effects are discussed along with a few consequences of improper modeling. A series of simulation and experimental studies are presented to probe both the one- and two-dimensional impact of thick mask effects. It will be shown that a simple constant edge bias appears sufficient for 1D features, but begins to break down when space-widths are less than about 45 nm. Investigation into the impact of corners and small 2D features indicates that a simple edge-based bias also breaks down for edge lengths less than about 60nm. A sample set of rules-based post-OPC HV corrections for 22nm node dimensions are proposed, although based on experimental results, it is concluded that more accurate resist modeling and scanner stability are required before being able to precisely predict and control HV effects. Finally, with some simplifying assumptions, simulation is used to predict the extent of potential HV effects of future EUV imaging systems.

This paper employs a direct analysis of the intensity and the phase of the diffracted light by rigorous electromagnetic field (EMF) simulations to investigate mask-induced imaging artifacts in EUV-lithography. Analysis of the diffraction efficiencies and phase differences between the diffraction orders versus mask and illumination parameters is used to explore EUV-specific imaging artifacts such as feature orientation dependent placement errors and feature sizes, shifts of the best focus position, process window asymmetries, and other aberration-like phenomena. The results of these simulations aim to understand the reason for these EUV-specific imaging artifacts and to devise strategies for their compensation. Finally, rigorous EMF models of light scattering from EUV-masks are applied to identify ideal mask absorber stacks using global optimization techniques.

Aerial images for isolated defects and the interactions of defects with features are compared between the Actinic Inspection Tool (AIT) at Lawrence Berkeley National Laboratory (LBNL) and the fast EUV simulation program RADICAL. Comparisons between AIT images from August 2007 and RADICAL simulations are used to extract aberrations. At this time astigmatism was the dominant aberration with a value of 0.55 waves RMS. Significant improvements in the imaging performance of the AIT were made between August 2007 and December 2008. A good match will be shown between the most recent AIT images and RADICAL simulations without aberrations. These comparisons will demonstrate that a large defect, in this case 7nm tall on the surface, is still printable even if it is centered under the absorber line. These comparisons also suggest that the minimum defect size is between 1.5nm and 0.8nm surface height because a 1.5nm defect was printable but a 0.8nm was not. Finally, the image of a buried defect near an absorber line through focus will demonstrate an inversion in the effect of the defect from a protrusion of the dark line into the space to a protrusion of the space into the line.

In the field of lithography technology, EUV lithography can be a leading candidate for sub-30 nm technology node. EUVL expose system has different characteristics compared to DUV exposure system. EUV source wavelength is short and no material is transparent to the source. So off-axis reflective optic system is used for patterning in place of on-axis refractive system of DUV system. And different reticle design is needed that consists of 40 pair of Mo/Si multi layer and absorber layer in place of conventional mask. Because of the oblique incidence on the mask, shadowing effect is occurred such as pattern asymmetry, shift and pattern bias depending on pattern orientation. For non-telecentric characteristics of EUV scanner, shadowing effect produces CD variation versus field position[1][2]. Besides, it is well known that EUV scanner has bigger flare than conventional DUV scanner. Therefore, the correction of mask shadowing effect and flare level are one of the important issues for EUV lithography. In this paper, process window and MEF of EUV lithography has been examined by 3D mask simulation. CD variation by shadowing is simulated for various pattern orientations. A shadowing correction method has been calculated due to field position to reduce shadowing effect. And the correction effect is examined by simulation and Experimental results. Principle of radial overlay shift due to field position is verified then the shift length of line and space pattern is calculated.

Future lithography systems must produce more dense microchips with smaller feature sizes, while maintaining throughput comparable to today's optical lithography systems. This places stringent data-handling requirements on the design of any maskless lithography system. Today's optical lithography systems transfer one layer of data from the mask to the entire wafer in about sixty seconds. To achieve a similar throughput for a direct-write maskless lithography system with a pixel size of 22 nm, data rates of about 12 Tb/s are required. Over the past 8 years, we have proposed a datapath architecture for delivering such a data rate to a parallel array of writers. Our proposed system achieves this data rate contingent on two assumptions: consistent 10 to 1 compression of lithography data, and implementation of real-time hardware decoder, fabricated on a microchip together with a massively parallel array of lithography writers, capable of decoding 12 Tb/s of data. To address the compression efficiency problem, in the past few years, we have developed a new technique, Context Copy Combinatorial Coding (C4), designed specifically for microchip layer images, with a low-complexity decoder for application to the datapath architecture. C4 combines the advantages of JBIG and ZIP, to achieve compression ratios higher than existing techniques. We have also devised Block C4, a variation of C4 with up to hundred times faster encoding times, with little or no loss in compression efficiency. While our past work has focused on characterizing the compression efficiency of C4 and Block C4 on samples of a variety of industrial layouts, there has been no full chip performance characterization of these algorithms. In this paper, we show compression efficiency results of Block C4 and competing techniques such as BZIP2 and ZIP for the Poly, Active, Contact, Metal1, Via1, and Metal2 layers of a complete industry 65 nm layout. Overall, we have found that compression efficiency varies significantly from design to design, from layer to layer, and even within parts of the same layer. It is difficult, if not impossible, to guarantee a lossless 10 to 1 compression for all blocks within a layer, as desired in the design of our datapath architecture. Nonetheless, on the most complex Metal1 layer of our 65 nm full chip microprocessor design, we show that a average lossless compression of 5.2 is attainable, which corresponds to a throughput of 60 wafer layers per hour for a 1.33 Tb/s board-to-chip communications link. As a reference, state-of-the-art HyperTransport 3.0 offers 0.32 Tb/s per link. These numbers demonstrate the role lossless compression can play in the design of a maskless lithography datapath.

Maskless lithography based on electron beam parallelization requires well adapted data links, capable of transmitting the corresponding data volume at rates up to the Tbps domain. In this paper we focus on a scalable (24 - 140 Gbps) optical data link, well adapted for future implementation in maskless lithography systems. The link comprises a high-speed data buffer with synchronizable architecture and scalable throughput (N x 24 Gbps), an optical free space transmission solution, a 45 channel low-noise optical receiver chip based on BiCMOS 0.6 micron technology and, finally, a Data Processor & Demux IP core implemented in VHDL.

The ever-growing demand for hard drives with greater storage density has motivated a technology shift from continuous magnetic media to patterned media hard disks, which are expected to be implemented in future generations of hard disk drives to provide data storage at densities exceeding 1012 bits per square inch. Step and Flash Imprint Lithography (S-FIL) technology has been employed to pattern the hard disk substrates. This paper discusses the infrastructure required to enable S-FIL in high-volume manufacturing; namely, fabrication of master templates, template replication, high-volume imprinting with precisely controlled residual layers, and dual-sided imprinting. Imprinting of disks is demonstrated with substrate throughput currently as high as 180 disks/hour (dualsided). These processes are applied to patterning hard disk substrates with both discrete tracks and bit-patterned designs.

UV NIL shows excellent resolution capability with remarkable low line edge roughness, and has been attracting pioneers in the industry who were searching for the finest patterns. We have been focused on the resolution improvement in mask making, and with a 100keV acceleration voltage spot beam EB writer process, we have achieved down to 16nm resolution, and have established a mask making process to meet the requirements of the pioneers. Usually such masks needed just a small field (several hundred microns square or so). At the same time, UV NIL exploration has reached the step of feasibility study for mass production, and full chip field masks have been required, though the resolution demand is not as tough as for the extremely advanced usage mentioned above. The 100kV EB writers are adopting spot beams to generate the pattern and have a fatally low throughput if we need full chip writing. So for full chip masks, we have started the adoption of 50keV variable shaped beam (VSB) EB writers, which are used in current 4X photomask manufacturing In this paper, we will show latest results both with the 100kV spot beam writer and the 50keV VSB EB writers. With the 100kV spot beam writer, we achieved 16nm resolution, but found that to achieve further improvement, an innovation in pattern generation method or material would be inevitable. With the 50kV VSB writers, we could generate full chip pattern in a reasonable time, and by choosing the right patterning material and process, we could achieve resolution down to 32nm. Our initial results of 32nm class NIL masks with full chip field size will be shown and resolution improvement plan to further technology nodes will be discussed. Eventually, NIL is coming closer to production stage. We will also start the discussion about the infrastructures necessary for NIL mask manufacturing in this paper.

In this paper, we investigate a novel nanofabrication process called soft UV nanoimprint lithography, for nanopatterning of compound semiconductors. We use flexible stamps with three layers and analyze their performance with wafers composed of III-V semiconductors. The developed stamp configuration is in many ways advantageous for the fabrication of precise gratings for various applications in photonics. We describe how to handle the deformation in both lateral and vertical directions by tuning the softness of the stamp and using a two step imprint process. As an application of the UV-NIL, we demonstrate a fabrication process for a laterally corrugated distributed feedback laser. Our laser fabrication process is free from regrowth and therefore easily adaptable to various material compositions and emission wavelengths. Due to the cost effective full wafer NIL, these lasers are attractive in various applications where low cost, single-mode laser diodes are required. Our development work improves the design freedom of the NIL fabrication process of the laser diodes, and improves the quality of the transferred patterns. To the best of our knowledge, this is the first demonstration of a single-mode laser diode fabricated by soft UV-NIL.

SEMATECH has initiated a nanoimprint program and started imaging experiments with a Molecular Imprints Imprio300^TM system at the SEMATECH facility in Albany, NY. An overview of the SEMATECH nanoimprint development program is presented as well as an assessment of nanoimprint technology strengths and weaknesses. SEMATECH plans to explore many of the critical aspects of the nanoimprint process to drive key improvements in overlay, imprint mask cleaning, and defectivity toward making nanoimprint technology a cost-effective lithography strategy for CMOS development and manufacturing applications. Results of nanoimprint overlay with a previous level exposed on a 1.35NA immersion lithography scanner show it has noticeably improved over previous results with champion data in the 18nm range. Imprint mask cleaning on an automated tool has shown no measurable degradation of critical dimension or line width roughness after ten cleaning cycles.

A computer-controlled laser beam recorder with a wavelength of 405 nm has been employed for patterning the deposited resist with feature sizes varying from a few hundreds of nanometers to tens of micrometers. Four inch silicon templates for hot embossing source/ drain electrodes and metallic circuit for a disposable biosensor were obtained. SEM and optical microscopy reveal accurate transfer of developed photoresist structures into the underlying silicon wafer after plasma dry etching. Etch depths between 100 - 600 nm were obtained on the templates, and were further transferred into the imprinted plastic substrate and the metallic layer.

In the UV-NIL template fabrication sequence usually four 65×65mm² templates are fabricated at once using a 6025 mask blank. After finishing all patterning processes and the etching of the imprint pedestals the templates are separated by dicing and polishing. This technique offers the advantage to use standard mask tools for the majority of the production steps. In order to check the imprint pattern on the mask CD measurements of quartz features are necessary. To control the fabrication process more effectively the additional measurement of resist features would be helpful. When the template is used for imprinting, repeated cycles of anti-adhesion layer deposition and cleaning after multiple imprints might change the CD of the quartz features. The metrology steps have to be performed on 1X features and are therefore more challenging, compared to those for 4X photomasks. For this purpose we evaluated the capability of Vistec's CDSEM LWM90xx for line-width measurements of nanoimprint templates. After optimization of hardware and software settings, the measurement capability for different feature sizes has been characterized. Finally, the evaluated results have been compared with the ITRS requirements for the 22nm node in order to address possible future needs.

The implementation of nanoimprint lithography as a nanoscale manufacturing technique for features below 50 nm requires accurate values for the physical properties of the polymers, such as Young's modulus, used in this fabrication process. These affect the flow of polymer during imprinting, and determine the strength and stability of the polymer structures that are produced. Most physical parameter values used for nanoimprinting are taken from bulk measurements. However below 100 nm, physical properties can change significantly due to the increased importance of surface and interface effects, and the confinement of polymer molecules. It order to measure directly the physical properties of samples with very small dimensions the ultrashort laser pulse photoacoustic method has been applied to layers of poly(methyl methacrylate) of thicknesses from 586 to 11 nm, spin-coated onto silicon wafers. Acoustic speeds, calculated from time of flight and film thicknesses as measured by ellipsometry, were found to increase below approximately 80 nm, with an increase of 20% for a 13 nm sample, compared to the bulk value. This corresponds to an increase in Young's modulus of 44%. It was found that when a layer of Hexamethyldisilazane (HMDS) adhesion promoter was spin-coated onto the silicon wafer, before the polymer, there was a much smaller increase in Young's modulus, of approximately 21%, at 16 nm thickness, which indicates that the increase is due to chemical effects at the interface. The photoacoustic process is numerically modelled to ensure a full analysis of the recorded signal.

Step and Flash Imprint involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed leaving a patterned solid on the substrate. Compatibility with existing CMOS processes requires a mask infrastructure in which resolution, inspection and repair are all addressed. The purpose of this paper is to understand the limitations of inspection at half pitches of 32 nm and below. A 32 nm programmed defect mask was fabricated. Patterns included in the mask consisted of an SRAM Metal 1 cell, dense lines, and dense arrays of pillars. Programmed defect sizes started at 4 nm and increased to 48 nm in increments of 4 nm. Defects in both the mask and imprinted wafers were characterized scanning electron microscopy and the measured defect areas were calculated. These defects were then inspected using KLA-T eS35 and NGR2100 electron beam wafer inspection systems. Defect sizes as small as 8 nm were detected, and detection limits were found to be a function of defect type.

The full-field EUV exposure tool dubbed EUV1 was fully integrated and we started static and scanning exposures with the projection optics NA (Numerical Aperture) of 0.25 and conventional partial illumination with coherence factor of 0.8. 32nm elbow patterns were resolved in full arc field in static exposure. In the central area 25nm L/S patterns were resolved. In the scanning exposure, 32nm L/S patterns were successfully exposed on a full wafer. Wavefront error of the projection optics was improved to 0.4nmRMS. Flare impact on imaging was clarified under the flare evaluation using Kirk test. Metal oxide capping layer and oxygen injection method to suppress carbon deposition were developed for the contamination control. Imaging capability with high NA projection optics is also reviewed.

EUVL is the most promising candidate of 32 nm generations and beyond. In this paper, we present Canon's development status of EUVL technologies. The system design of the EUV full field high volume manufacturing tool (VS2) is under way. The specification of VS2 is presented in this paper. The fabrication of six-aspheric-mirror prototype projection optics (PO1) of NA 0.3 has been started. The PO1 is fabricated to evaluate and improve our technologies of polishing and measuring the figure of mirrors. We present some results of the figuring accuracy of the mirror. EUVL will be required to resolve sub-twenty nm L&S patterns. We are studying off-axis illumination technologies and high- NA technologies. The simulation results of the resolution capability and the DOF are presented.

Full-field EUV exposure tool named EUV1 integrated and exposure experiments were started with the numerical aperture of the projection optics of 0.25 and conventional partial coherent illumination with the coherence factor of 0.8. 32nm elbow patterns were resolved in full arc field in static exposure. In the central area 25nm line-and-space patterns were resolved. In scanning exposure, 32nm line-and-space patterns were successfully exposed on a full wafer. Wavefront error of the projection optics was improved to 0.4nmRMS. Flare impact on imaging was clarified depend on the flare evaluation using Kirk test. RET fly's eye mirrors and reflection-type SPF are investigated to increase throughput. High-NA projection optics design is also reviewed.

This paper concerns the readiness of extreme ultraviolet lithography (EUVL) for high-volume manufacture based on accelerated development in critical areas and the construction of a process liability (PL) test site that integrates results in these areas. The overall lithography performance was determined from the performance of the exposure tool, the printability obtainable with the resist, mask fabrication with accurate critical dimension (CD) control, and correction technology for mask data preparation. The EUV1 exposure tool can carry out exposure over the full field (26 mm × 33 mm) at a resolution high enough for 32-nm line-and-space patterns when Selete Standard Resist 3 (SSR3) is used. Thus, the test site was designed for the full-field exposure of various pattern sizes [half-pitch (hp) 32-50 nm]. The CD variation of the mask was found to be as good as 2.8 nm (3σ); and only one printable defect was detected. The effect of flare on CD variation is a critical issue in EUVL; so flare was compensated for based on the point spread function for the projection optics of the EUV1 and aerial simulations that took resist blur into account. The accuracy obtained when an electronic design automation (EDA) tool was used for mask resizing was found to be very good (error ≤ ±2 nm). Metal wiring patterns with a size of hp 32 nm were successfully formed by wafer processing. The production readiness of EUVL based on the integration of results in these areas was evaluated by electrical tests on low-resistance tungsten wiring. The yield for the electrically open test for hp 50 nm (32-nm logic node) and hp 40 nm (22-nm logic node) were found to be over 60% and around 50%, respectively; and the yield tended to decrease as patterns became smaller. We found the PL test site to be very useful for determining where further improvements need to be made and for evaluating the production readiness of EUVL.

The performance of a 0.25NA full-field EUV exposure tool is characterized in terms of CD uniformity, focus and overlay control, as well as dose uniformity. In addition to the characterization of the scanner, we explore the use of scatterometry techniques for the measurements of extremely fine resolution features, with critical dimensions below 40 nm. The stability of the scanner performance over an extended period of time is assessed.

We have developed an actinic full-field EUV mask blank inspection tool that consists of an EUV light source, a 26X Schwarzschild optics for dark-field imaging, an EUV-sensitive backside-illuminated charge-coupled-device (BI-CCD) camera, and a mechanical mask stage with a stroke range of 160 mm. A critical illumination system is employed by setting ellipsoidal and plane mirrors to illuminate an area of mask blank that is to be inspected. Since in this setup a circular area on the mask blank with approximately 0.8 mm diameter is illuminated, a 0.5×0.5 mm² square image area can be addressed without moving the mask stage. The inspection tool can also be operated under time delay and integration (TDI) mode by scanning the mask stage with a constant velocity. In spite of comparatively large effective pixel size of 500 nm on the mask blank, small defect-to-pixel ratio such as 0.12 for phase defect of 60 nm in width and 1.5 nm in height, was established as a measured value of defect detection sensitivity by using both static imaging mode and time-delay and integration (TDI) operation mode.

Extreme ultraviolet (EUV) microscopy is an important tool for the investigation of the performance of EUV masks, for detecting the presence and the characteristics of defects, and for evaluating the effectiveness of defect repair techniques. Aerial image measurement bypasses the difficulties inherent to photoresist imaging and enables high data collection speed and flexibility. It provides reliable and quick feedback for the development of masks and lithography system modeling methods. We operate the SEMATECH Berkeley Actinic Inspection Tool (AIT), a EUV microscope installed at the Advanced Light Source at Lawrence Berkeley National Laboratory. The AIT is equipped with several highmagnification Fresnel zoneplate lenses, with various numerical aperture values, that enable it image the reflective mask surface with various resolution and magnification settings. Although the AIT has undergone significant recent improvements in terms of imaging resolution and illumination uniformity, there is still room for improvement. In the AIT, an off-axis zoneplate lens collects the light coming from the sample and an image of the sample is projected onto an EUV-sensitive CCD camera. The simplicity of the optical system is particularly helpful considering that the AIT alignment has to be performed every time that a sample or a zoneplate is replaced. The alignment is sensitive to several parameters such as the lens position and orientation, the illumination direction and the sample characteristics. Since the AIT works in high vacuum, there is no direct access to the optics or to the sample during the alignment and the measurements. For all these reasons the alignment procedures and feedback can be complex, and in some cases can reduce the overall data throughput of the system. In this paper we review the main strategies and procedures that have been developed for quick and reliable alignments, and we describe the performance improvements we have achieved, in terms of aberration magnitude reduction.

Extreme ultraviolet lithography (EUVL) is the most effective way to print sub-32 nm features. We have assessed EUVL resist readiness for 32 nm half-pitch (HP) manufacturing, presenting process feasibility data such as resolution, depth of focus (DOF), line edge roughness/line width roughness (LER/LWR), mask error enhancement factor (MEEF), resist collapse, critical dimension (CD) uniformity, post-exposure delay (PED) stability, and post-exposure bake (PEB) sensitivity. Using the alpha demo tool (ADT), a full field ASML EUV scanner, we demonstrate the feasibility of a k₁ ~0.593 resist process for 32 nm HP line/space (L/S) patterning. Exposure latitude (EL) was 13% at best focus, and DOF was 160 nm at best dose using a 60 nm thick resist. By incorporating a spin-on underlayer, the process margin could be improved to 18.5% EL and 200 nm DOF. We also demonstrate ADT extendibility using a state-of-the-art EUV platform. A k₁ ~0.556 resist process was demonstrated for 30 nm HP L/S patterns, providing a 13% EL, 160 nm DOF, and a common process window with isolated lines. 28 nm HP patterning for a k₁ ~0.528 resist process could be feasible using a more advanced resist with improved DOF and resist collapse margin.

Typical extreme ultraviolet (EUV) photoresist is known to outgas carbon-containing molecules, which is of particular concern to the industry as these molecules tend to contaminate optics and diminish reflectivity. This prompted extensive work to measure these species and the quantities that they outgas in a vacuum environment. Experiments were performed to test whether the outgassing rate of these carbon-containing molecules is directly proportional to the rate at which the EUV photons arrive and whether a very high power exposure will cause the same amount of outgassing as a much lower power exposure with the dose unchanged.

Thermal embossing nanoimprint lithography (NIL) is an area of continuing interest because it allows direct patterning of nanoscale structures into a wide variety of functional polymer materials. Measuring the shape evolution of nanoimprinted lines during thermal annealing can provide insights into mechanisms of polymer stability and the dynamics of polymer flow. Recently, we have used optical scatterometry to extract the profile of nanoimprinted lines in low- and high-molecular mass polymer gratings during annealing of the gratings at the glass transition temperature. The data are obtained in situ using a spectroscopic ellipsometer and analyzed using a rigorous-coupled-wave scatterometry model. The results obtained from scatterometry are in very good agreement with those measured ex situ by atomic force microscopy and specular x-ray reflectivity, revealing very different decay mechanisms for gratings in low- and high-molecular mass polymers. The role of the selection of grating model in determining the uncertainties the grating line profile extracted from scatterometry is also discussed.

UV-curable resist formulations for nanoimprint must satisfy many requirements for viscosity, volatility, curing rate, cohesion of the cured material and release from the template in addition to being successfully imprintable. In this paper we describe studies of several vinyl ether resist systems. Although all resist formulations have low viscosity, low volatility and fast curing rate, significant variations in mechanical, fracture energy properties, fracture behaviors and cured film roughness with resist compositions are found. The results show the addition of reactive diluent to resist can lead to low fracture energy and low cured film roughness, consistent with significant control of the cured resist plasticity.

Nanoimprint lithography has advantages such as good resolution, CD uniformity and LER. However, nanoimprint lithography involves risks. In particular, defectivity is the most critical issue for nanoimprint lithography. Above all, the "non-fill defects" dominate such defects for UV nanoimprint. At the filling process of imprint resist, the capillary force that occurs between an imprint-resist and surface of template plays an important role. Our experience, suggests there is a relationship between the filling characteristics and pattern size of template. We also think the resist properties and the environmental conditions such as atmosphere pressure play important roles in the filling process. This paper explains the filling process dependency on the properties mentioned above. We analyzed the filling process using fluid simulation. At first, we assumed several pattern sizes with the same pattern height. Then, the filling times were estimated for each pattern size with various resist properties and the environmental conditions. An important attribute of our simulation model is the consideration accorded to the dissolution of gas between the template and imprint resist. As a result, the filling time of smaller pattern was found to be shorter than that of larger pattern. The assumed patterns are space and via on template ranging in size from 22nm width to 1000nm-width. The pattern height is 60nm. In this paper, we studied characteristics of filling mechanism by using fluid simulation. The relations between CD and filling time were obtained. We found that the gas dissolution rate is the dominant parameter for filling time.

We have developed a processing method that significantly reduces the number of steps necessary to yield a surface that directs block copolymer assembly. This methodology employs a single resistless lithography step that directly changes the surface energy without requiring subsequent material deposition or plasma etching steps. The lithographically defined difference in surface energies acts as a template to direct diblock polymer self-assembly into low-defect periodic structures. Our newly developed lithographically directed self-assembly technique can produce sub-45 nm half pitch lines employing poly(styrene-b-methyl methacrylate) (PS-b-PMMA) and interference lithography. Once assembled into periodic lines of alternating materials, the PMMA block can be removed and the resulting polystyrene features can be used as an etch mask to transfer periodic lines-and-spaces into a silicon substrate.

Step-and-Flash Imprint Lithography (S-FIL) is a promising lithography strategy for semiconductor manufacturing at device nodes below 32nm. The S-FIL 1:1 pattern transfer technology utilizes a field-by-field ink jet dispense of a low viscosity liquid resist to fill the relief pattern of the device layer etched into the glass mask. Compared to other sub 40nm CD lithography methods, the resulting high resolution, high throughput through clustering, 3D patterning capability, low process complexity, and low cost of ownership (CoO) of S-FIL makes it a widely accepted technology for patterned media as well as a promising mainstream option for future CMOS applications. Preservation of mask cleanliness is essential to avoid risk of repeated printing of defects. The development of mask cleaning processes capable of removing particles adhered to the mask surface without damaging the mask is critical to meet high volume manufacturing requirements. In this paper we have presented various methods of residual (cross-linked) resist removal and final imprint mask cleaning demonstrated on the HamaTech MaskTrack automated mask cleaning system. Conventional and non-conventional (acid free) methods of particle removal have been compared and the effect of mask cleaning on pattern damage and CD integrity is also studied.

A mathematical model and numerical method are described, which make it possible to simulate ultraviolet ("step and flash") nanoimprint lithography (UV-NIL) process adequately even using standard Personal Computers. The model is derived from 3D Navier-Stokes equations with the understanding that the resist motion is largely directed along the substrate surface and characterized by ultra-low values of the Reynolds number. By the numerical approximation of the model, a special finite difference method is applied (a coarse-grain method). A coarse-grain modeling tool for detailed analysis of resist spreading in UV-NIL at the structure-scale level is tested. The obtained results demonstrate the high ability of the tool to calculate optimal dispensing for given stamp design and process parameters. This dispensing provides uniform filled areas and a homogeneous residual layer thickness in UV-NIL.

There are several applications either currently in production or in late stage R&D, for UV-based Nanoimprint Lithography (UV-NIL) and Hot Embossing (HE) that require a full-field imprint technology in order to make these processes either feasible or costeffective. These applications cover a wide range of features sizes from the millimeter range down to sub-100 nm. Because of the total thickness variation (TTV) associated with the imprinted substrates, full-field imprinting requires fabrication of a "soft" or "working" stamp from a "hard" stamp usually made from materials such as nickel, quartz or silicon. Several materials and processes have previously been identified that allow for full-field imprinting, however, these materials all have drawbacks associated with them that hinder their movement into High Volume Manufacturing (HVM) environments. EV Group Inc (EVG) has, in cooperation with our NILCOM^TM partners, identified a novel set of polymeric materials and stamp fabrication processes that allow for full-field imprinting solutions suitable for these HVM environments. These materials have proven effective for imprinting at both millimeter feature sizes all the way down to 50 nm - full field. These materials, and the processes associated with their fabrication into working/soft stamps, should allow for a superior cost-of-ownership benefit and facilitate the movement of imprint lithography into industrial applications.

Electron beam direct write (EBDW) can be utilized for developing metrology methods for future technology nodes. Due to its advantage of high resolution and flexibility combined with suitable throughput capability, variable-shaped E-Beam lithography is the appropriate method to fabricate sub 40nm resist structures with accurately defined properties, such as critical dimension (CD), pitch, line edge roughness (LER) and line width roughness (LWR). In this study we present results of exposure experiments intended to serve as an important instrument for testing and fitting various metrology and defect density measurement methods for future technology nodes. We successfully fabricated sub 40nm gratings with varying CD, pitch, programmed defects and LER/LWR. First metrology measurements by means of optical scatterometry on these dense structures show that variation of the signal response is sufficient to detect sub 10nm fluctuations with a satisfying repeatability.

Sub-30 nm resolution parallel EB lithography based on a planar type silicon nanowire array ballistic electron emitter (PBE) is demonstrated in this paper. The Parallel EB lithography is performed on a 1:1 electron projection system. The system consists of the PBE as a surface electron source, a target wafer parallel to the electron source, and uniform vertical electromagnetic fields. The PBE contained the desired pattern and projected the patterned electron image on the target. Using the PBE, the electron projection system provides a high resolution of the parallel lithography without any serious chromatic aberrations. The PBE emits ballistic and/or quasiballistic electrons with small angle dispersion and small energy dispersion by quantum confinement effect in the PBE. As results of that, the parallel EB lithography achieved high resolution below 30nm even in a low accelerating voltage condition. The 1:1 paralell EB lithography system based on the PBE provides next generation device fabrication technique.

In this work, we investigated possible geometry optimizations of backscattered electron (BSE) detectors in order to significantly improve the signal to noise ratio (SNR) of shallow Si-topographic marks. To achieve this, Monte Carlo simulations of the BSE angular distribution as well as of the BSE exit position were performed. A comparison of some theoretical calculations with the respective experimental results allowed us to qualify the theoretical results. Based on these results, we are able to present an optimized BSE detector design featuring a significant improvement of the measured SNR.

The paper demonstrates that the ion beam milling process can be modelled as a local isotropic etching without taking into account the material re-deposition during the sputtering. It also presents a software, IonRevSim, specifically developed to simulate the 3D ion structuring and thus to validate and if necessary to optimise off-line the processing parameters. In particular, employing the IonRevSim software it is possible to prepare the necessary data for performing 3D ion milling and then to simulate the 3D structuring process in order to validate it. These two main functions and their operating modes are discussed in the paper. Experimental verification based on optimised data prepared by IonRevSim was performed using both FIB tool and multi-beam CHARPAN PMLP tool. For both ion-patterning techniques good coincidence was demonstrated for structures of low aspect ration.

The accuracy of line-width control and image placement on mask has become a matter of serious concerns with continued reduction of design rules in semiconductor device fabrication. The smallest changes in environment during mask-exposure can cause significant damage to mask since these deviations result in increased mask cost because the number of times that a mask is repaired and reproduced increases. In the year 2006, Mask Design, Drawing, and Inspection Technology Research Department (Mask D2I) at the Association of Super-Advanced Electronics Technologies (ASET) launched a 4-year development program for the optimization of mask design, drawing, and inspection to reduce the manufacturing cost of photo-mask. In this program, we are developing a self-diagnostic technology that can monitor the process of data transfer and check the environment during exposure to improve the reliability of the mask writer. This technology, by detecting the process deviations before they occur can increase the efficiency of mask inspection.

Electron Beam Direct Writing (EBDW) has been applied to various applications such as prototyping or small amount production of electronic devices. Originally, proximity effect in EBDW is considered as the problem of the background energy difference caused by the pattern density distribution. However, the critical dimensions of target patterns are getting smaller, we cannot ignore influences of the forward scattering. Theoretically, when the critical dimension is close to 3 or 4 times of forward scattering range, influence cannot be ignored. For example, in case of that corresponds, fabricating 20 nm dimension patterns by Nano Imprint Lithography (NIL) which is significant candidate of next generation lithography technology. Because it requires original dimension (1:1) mold. Therefore proximity effect correction (PEC) system which considers the forward scattering must be important. We developed simulation-based proximity effect correction system combined with data format conversion, works on Linux PC cluster. And we exposed the patterns which are dose compensated by this system. Firstly, we have speculated parameters about backward scattering parameters by exposing 100 nm line and space patterns. We got following parameters, beta (backward scattering range) = 32 um, eta (backward scattering coefficient) = 2.5. Secondary, we have exposed Line and Space patterns whose dimensions are from 20 nm to 100 nm. We found that smaller and dense patterns have trend to be over exposed and bigger. Experimental specification is following, EB Direct Writing system is JBX-9300FS (100keV acc. Voltage) by JEOL co.ltd, (Japan) , resist is HSQ (FOx 12) by Dow Corning co. (United States), substrate is Si.

Fabrication of 16 nm pitch L&S pattern was investigated by applying self-organizing material as etching mask. For the purpose, diblock copolymer template composed of polystyrene-polyethyleneoxide (PS-PEO) and spin-on-glass (SOG) was utilized. The material was prepared to form polystyrene cylinder phase in PEO phase. SOG was located in the PEO phase, because of its hydrophilic property. After spin-coating on a Si wafer, film was baked at high temperature. By the thermal treatment, PS cylinder phase was eliminated to form cavities in the cured SOG matrix. Using the cured Si matrix pattern as etching mask, Si substrate was etched. When baking was carried out at 300° C, bridge-like defects were observed on Si pattern. The thermogravimetric examination indicated the baking at 400° C could reduce the defects. Applying the optimized process, 16nm pitch L&S pattern was transferred on Si substrate.

We present Interference Assisted Lithography (IAL) as a promising and cost-effective solution for extending lithography. IAL achieves a final pattern by combining an interference exposure with a trim exposure. The implementation of IAL requires that today's 2D random layouts be converted to highly regular 1D gridded designs. We show that an IAL-friendly 6T SRAM bitcell can be designed following 1D gridded design rules and that the electrical characteristics is comparable to today's 2D design. Lithography simulations confirm that the proposed bitcell can be successfully imaged with IAL.

The life-time of the collection optics of an LPP EUV source is computationally studied. The near-field (radiating layer, micrometer scale) and far-field (optics, meter scale) radiation and particle dynamics are investigated with a twodimensional/ axisymmetric coupled hydrodynamic-particle code, which is used together with an atomic physics code to predict the laser-plasma processes. The droplet target is found to have a conversion efficiency of 2.2%. The nonuniformity of the initial plasma expansion is detailed. In the far field study, the neutral and ion distributions are projected on a normal incidence mirror. Ions up to Sn⁴⁺ reach the mirror. Fast neutrals mostly deposit in the central region of the mirror, while ions erode the outer region. The simulated ion kinetic energies, which are in the range of a few keV volts match experimental values. The local time durations for a reflectivity drop from 70% to 60% are in the range of 2.5 to 4 hours. The extension of the life-time of the collection optics up to 30'000 hours requires either a 4 order of magnitude reduction of the ion flux or a 5-fold reduction of the ion kinetic energies. In order to fulfill the EUVL source requirement of continuous operation, an effective mitigation scheme for fast ions and neutrals is mandatory.

EUVL solution for HVM at the 22 nm node requires a high power long-term EUV source operation with hundreds of watts at the intermediate focus output. EUV mask blank and mask defects inspections require at-wavelength tools with high brightness. Theoretical analysis with a 2-D radiation MHD code Z* has been performed to address key issues in EUV plasma sources with radiation transfer. The study shows that self-absorption defines the limiting brightness of a single EUV source, which cannot meet the requirements of the HVM tool with high efficiency and is not sufficient for critical metrology applications, given the limiting etendue of the optics. It is shown that the required irradiance can be achieved by spatial multiplexing, using multiple small sources. We present here details of the study, as well as experimental results from a novel EUV light source with an intrinsic photon collector demonstrating high brightness, the i-SoCoMo concept, where an impulse micro discharge plasma source is integrated to a photon collector based on an active plasma structure. The small physical size and low etendue properties of the i-SoCoMo unit allows a large number of such sources to be put together in one physical package and be operated in a multiplexed fashion to meet necessary power requirements.

We have developed a grid-type spectral purity filter (SPF) for suppression of infrared radiation in laser-produced plasma (LPP) EUV sources for high-volume EUV lithography. The SPF is a silicon grid with sub-wavelength periodicity that is metalized to make it reflective for infrared radiation. EUV radiation is transmitted geometrically through the open area of the grid. The first prototype samples show an in-band EUV transmittance of 74% at normal incidence. Infrared spectrometry exhibits a clear cut-off behavior as expected, with a transmittance of <0.1% at a wavelength of 10.6 µm. In a first power-load test, a grid was exposed to a CO₂ laser at 100 W/cm² in vacuum for 8 hours. Another grid was kept at 800 °C in a vacuum oven for 24 hours. Both grids remained structurally intact and maintained an infrared transmittance of <0.1%.

The depth of mass ablation in planar Sn targets during the interaction with a pulsed Nd:YAG laser was investigated. The pulse duration and laser spot size were fixed, and the laser energy was varied to achieve laser intensities from approximately 10¹¹ to 10¹² W/cm², which is relevant to the extreme ultraviolet (EUV) lithography application. The ablation depth was measured by irradiating layered targets consisting of a thin Sn coating with variable thickness evaporated onto a Si wafer. The Sn coating thickness at which the signatures of Si ions in the expanding plasma disappeared indicated the ablation depth. Redundant diagnostics were utilized to detect Si ions in the expanding plasma, including a calibrated EUV energy monitor, an EUV spectrometer, and an electrostatic ion energy analyzer. The ablation depth was found to scale with the laser intensity to the (5/9)^th power, which is consistent with analytical models of steady-state laser ablation developed for the laser fusion application, at which laser intensity is generally higher than present in the EUV lithography application.

We investigate characteristic feature of the atomic radiation from tin plasmas, which allow one to obtain high power EUV emission at λ=13.5nm efficiently. We develop a collisional radiative model of tin ions to calculate steady-state and time dependent ion abundance, level population, and coefficients of radiative transfer of the plasma. The model, which is based atomic data calculated using the Hullac code is refined both theoretically and experimentally. Calculation of the spectral emissivity and opacity are carried out over a wide range of plasma density and temperature, and pumping conditions to obtain high conversion efficiency are discussed.

Despite a higher conversion efficiency of Sn for extreme ultra violet (EUV) light generation at 13.5 nm, Sn contamination on collector optics in EUV source systems must be overcome before adopting Sn as EUV fuel. Considerable portion of debris from Sn source can be suppressed by various debris mitigation techniques. However, debris mitigation technique alone will not be sufficient for high volume manufacturing (HVM) scale light production. Sn contamination affects not only the light output but also cost of ownership because of costly and time-consuming cleaning or replacing. In order to solve this contamination issue, Center for Plasma Material Interactions (CPMI) at University of Illinois at Urbana-Champaign(UIUC) had been working on cleaning Sn from EUV collector mirror surface using inductively coupled plasma-reactive ion etching (ICP-RIE) method. Previously, our group showed the fast cleaning rate of >100±10 nm/min and the dependence of cleaning on plasma-source location. Atomic force microscopy (AFM) surface roughness scan after cleaning showed almost 95% recovery in root-mean-square roughness compared to before-cleaning. Sn debris contamination can also be cleaned by halogen gas at high pressure (several hundreds mTorr). However, cleaning rate is much slower so that longer cleaning time is needed and other components in the system can be harmed by high pressure of corrosive gas. In this study, a remote plasma cleaning method is newly investigated. We designed and fabricated a remote plasma cleaning system which operates with 13.56MHz RF. A residual gas analyzer is used to quantify the chlorine radicals generated in a remote plasma system. A comparative study on the chlorine radicals generated in ICP and remote plasma is carried out. The initial result with gas temperature control shows that more chlorine radicals generate by remote plasma than ICP. It is also reported that high power can produce more chlorine radicals as expected.

We realized a laser-plasma EUV target, which satisfied the high EUV CE and the debris suppression simultaneously by using low-concentration liquid jet/droplet targets containing tin oxides and chlorides. Plasma regulation by double pulse irradiation improved the EUV CE. In terms of the debris emissions, we reduced the amount of the deposited tin oxide by applying in situ heat and high-energy photons onto a witness plate. These active debris suppression resulted in the decrease of the deposition rate and deoxidation of the debris, respectively. The use of tin chloride liquid target also realized a well-balanced debris behavior, where deposited debris was cleaned by chlorine atoms or ions, resulting in an approximately zero deposition rate.

We are developing a CO₂ laser driven Sn plasma light source for HVM EUVL. This source enables cost-effective high-conversion efficiency (CE >4%) and EUV power scaling. To evaluate light source characteristics we developed a metrology tool for the EUV and for the out of band (DUV, IR) wavelength region. The EUV plasma light source emits radiation ranging from the EUV to the IR. To evaluate a particular wavelength region, spectral purity filters are used to select the region of interest. For the in-band EUV emission the power, the energy stability and the radiation profile are measured. The power is measured with an attenuating filter and a powermeter. The energy stability is measured with a filterd X-ray diode. The radiation profile is measured with a phosphor plate and a VIS-CCD camera. For the out of band emission, the radiated power is measured with an attenuating filter and a powermeter. The out of band region includes the CO₂ laser which is partly scattered by the plasma and reflected towards the IF and needs therefore to be included into the measurement.

The source collector module (SoCoMo) for the extreme ultraviolet (EUV) small-field exposure tool (SFET) had been operated for 1,700,000,000 pulse radiations using more than 20 electrodes, four debris mitigation tools (DMT), and three collector mirrors. After 600 million pulse radiations, it was found that the EUV light intensity at wafer plane had been decreased to less than 10% of the initial value and the pupilgram exposed by SFET had been drastically deteriorated. In order to study on the cause of the intensity reduction and to maintain the intensity highly, three new evaluation tools were introduced; collector position monitors, an intermediate focus (IF) spot position monitor, and an attachment of screen tool. Utilizing these tools, it was clarified that the main causes of EUV light intensity reduction at IF plane were the plasma fluctuation with electrode erosion, the degradation of DMT's optical transmissivity, and the degradation of collection efficiency. These results indicated that it would be necessary for future SoCoMo not only to achieve highpower, stable and long-life performance, but also to equip with the functions that these tools provided in order to maximize its own performance.

Previous experiments on Nd:YAG laser produced Sn plasmas showed little dependence of the location of the dominant in-band extreme ultraviolet emitting region on target geometry. Modeling and experiments were preformed in order to better understand this phenomenon. A two-dimensional radiation hydrodynamic code, h2d, was benchmarked with experiments using Sn microspheres. Numerically obtained densities above the diagnostic limitation and temperature profile maps, which cannot be measured experimentally, were used to explain the effect, which comes from a relatively small change in the location of the critical density surface. This is important to EUV lithography because both the density and temperature play significant roles in the generation and transport of in-band EUV light. It is desired to have the highest possible density at the dominant emitting surface and the smallest possible surrounding plasma to produce high 13.5 nm conversion efficiency (2% bandwidth). The target geometry impacts the amount of lateral expansion leading to dramatically different density profiles and therefore can be optimized to meet these conditions.

At CPMI, we built a prototype portable, modified electrostatic spherical sector analyzer (ESA) device incorporating a neutral detector; investigated its capabilities for measuring energetic neutrals; and report results in this paper. This detector at the IF will contain a quartz crystal microbalance (QCM), Si witness plate for ex situ analysis, a set of microchannel plates (MCPs) with corresponding ion-diverting apparatus, Faraday cup as well as triple Langmuir probe. These detectors will be capable of quantifying total particle flux, neutral particle flux, and charged particle flux. To verify the capabilities of the detector, CPMI constructed a mock collector optic, which was placed inside the experimental chamber attached to CPMI's XTS 13-35 EUV source. This mock-up simulates the reflection of debris created by discharge-produced plasma (DPP), although it will not be capable of reflecting the EUV light. Recent results on the neutral, charged particle flux, and the carbon and oxygen contamination on a Si witness plate out of the line of sight of the Z-pinch are reported in this paper.

This paper is devoted to the development of laser produced plasma (LPP) EUV source architecture for advanced lithography applications in high volume manufacturing of integrated circuits. The paper describes the development status of subsystems most critical to the performance to meet scanner manufacturer requirements for power and debris mitigation. Spatial and temporal distributions of the radiation delivered to the illuminator of the scanner are important parameters of the production EUV tool, this paper reports on these parameters measured at the nominal repetition rate of the EUV source. The lifetime of the collector mirror is a critical parameter in the development of extreme ultra-violet LPP lithography sources. Deposition of target material and contaminants as well as sputtering and implantation of incident particles can reduce the reflectivity of the mirror coating substantially over time during exposure even though debris mitigation schemes are being employed. We report on progress of life-test experiments of exposed 1.6sr collectors using a Sn LPP EUV light source. The erosion of MLM coating is caused mostly by the high-energy ions generated from the plasma. In this manuscript the ion distribution measured at small (14 degree) and medium (45 degree) angles to the laser beam are presented. The measurements show that the chosen combination of the CO2 laser and Sn droplet targets is characterized by fairly uniform angular ion energy distribution. The maximum ion energy generated from the plasma is in the range of 3-3.5 keV for all incident angles of the collector. The measured maximum energy of the ions is significantly less than that measured and simulated for plasmas generated by short wavelength lasers (1 μm). The separation of ions with different charge states was observed when a retarding potential was applied to the Faraday Cup detector.

Two projects are being conducted in EUVA under the support of NEDO and member companies; private project and national project. The private project is responsible for power improvement of a source module targeting realization of 115-W prototype. The national project covers wide area of remaining issues on a collector module to achieve sufficient reliability. In the private project, a laser-ablation-discharge-produced plasma (LADPP) is being researched as a candidate of high-power EUV source. LADPP has fascinating properties such as long lifetime, high collection efficiency, and high thermal input. More than 15 % of collection efficiency could be obtained with LADPP because of its small plasma size. Pulse repetition frequency has reached 20 kHz and 580 W/2πsr were achieved so far. In order to increase conversion efficiency (CE), detailed diagnostics of LADPP were carried out. Especially, dependence of CE on laser pulse duration is derived from the experiment. As a result, dynamics of LADPP was understood and solution to increase CE and improve frequency scalability was understood. A fundamental experiment predicted that CE can be increased 60 %.

The Energetiq EQ-10 is a medium-power (10 W/2π, 13.5nm +/- 1%, Xenon) EUV source suitable for a variety of mirror testing, resist exposure, and defect inspection applications. The EQ-10 was designed to operate at a pulse frequency of 1 to 2 kHz¹. However, exposure equipment appropriate for High Volume Manufacturing (HVM) requires sources which are projected to operate at 10 kHz or greater². To minimize technical risk in infrastructure development programs now under way in support of future HVM production, scaling of various physical processes with pulse rate require investigation. A program to redesign the EQ-10 to operate at 10 kHz pulse rate has been completed. We report here on the design process and the operating characteristics of the high-frequency source.

Laser produced plasma (LLP) sources are generally considered attractive for high power EUV production in next generation lithography equipment. Such plasmas are most efficiently excited by the relatively long, infrared wavelengths of CO₂-lasers, but a significant part of the rotational-vibrational excitation lines of the CO₂ radiation will be backscattered by the plasma's critical density surface and consequently will be present as parasitic radiation in the spectrum of such sources. Since most optical elements in the EUV collecting and imaging train have a high reflection coefficient for IR radiation, undesirable heating phenomena at the resist level are likely to occur. In this study a completely new principle is employed to obtain full separation of EUV and IR radiation from the source by a single optical component. While the application of a transmission filter would come at the expense of EUV throughput, this technique potentially enables wavelength separation without loosing reflectance compared to a conventional Mo/Si multilayer coated element. As a result this method provides full spectral purity from the source without loss in EUV throughput. Detailed calculations on the principal of functioning are presented.

For the continued advancement of lithography, specifically extreme ultraviolet lithography (EUVL), particle contamination on the photomask and the subsequent removal of these particles is of critical importance. Particle contamination on the photomasks can result in defects printed on devices and their subsequent failure and/or process throughput reduction. A new idea for the removal of these particles is to utilize the energy in metastable species in a plasma. In a laboratory or processing plasma where ionization fraction is relatively low, there exists metastable species with long lifetimes that have significant energy, in some cases on the order of ~20 eV. Through a combined process of ion bombardment as well as the energy transferred from the neutralization of the metastable species, particles on a surface can be reduced to volatile compounds which can be pumped off of the surface thus reducing the particle contamination on the surface. Preliminary results for the removal of polystyrene latex (PSL) nano particles on low resistivity silicon wafers have shown approximately 20 nm/min removal rates. The removal rate obtained through the use of the PACMAN technique is much faster compared to just metastable cleaning alone. The current results of the removal of particles via the PACMAN technique will be presented as well as a damage assessment if any caused by this process.

This paper presents a calibration line between leaky surface acoustic wave (LSAW) velocities (VLSAW) and coefficient-of-thermal-expansion (CTE) characteristics for TiO₂-doped SiO₂ (TiO₂-SiO₂) glass to evaluate the absolute CTE by the line-focus-beam ultrasonic material characterization (LFB-UMC) system. Commercial TiO₂-SiO₂ ultra-low-expansion glass and synthetic silica glass were selected as specimens. We measured V_LSAW by the LFB-UMC system and CTE characteristics by dilatometers, and obtained relationships among VLSAW, CTE at 22°C {CTE(22°C)} and zero-CTE temperature {T(zero-CTE)}. Resolutions of CTE(22°C) and T(zero-CTE) determined by the LSAW velocity measurement were estimated as ±0.72 (ppb/K) and ±0.14°C (±2σ, σ. standard deviation) at 225 MHz. Both manufacturers and users can precisely inspect T(zero-CTE) for all EUVL-grade ultra-low-expansion glass substrates by this indirect evaluation method using the calibration line.

We present results on a table-top microscope that uses an EUV stepper geometry to capture full-field images with a halfpitch spatial resolution of 55 nm. This microscope uses a 13.2 nm wavelength table-top laser for illumination and acquires images of reflective masks with exposures of 20 seconds. These experiments open the path to the realization of high resolution table-top imaging systems for actinic defect characterization.

One of the critical issues for EUVL masks is clean and particle-free mask handling. We reported that the number of particle adders on the front side of a mask in the dual pod during the process from the load port to putting on the Electrostatic chuck (ESC) in vacuum could be reduce to less than 0.01 particle/cycle (≥46 nm). In addition, we found that chucking the mask on the ESC caused two serious issues. The first is that many particles stick to on the backside of the mask after chucking on the ESC, raising the question of whether the particle adders on the backside will travel to the front side. We examined the travel of these particles using the substrates after chucking and polystyrene latex (PSL) substrates that were dispersed on the backside. These experiments show that there is very little probability that particles on the backside will travel to the front side. The second issue is whether the mask blanks will charge up by chucking on the ESC and some particles will add on the front side. We measured the electric potential of the back and front sides of the mask and examined the particle adders. Our experiments revealed that to protect the mask from the particles, the mask must be grounded from the beginning to the end. For these two issues, we confirmed that a dual pod system works effectively to protect the mask from particles. This work is supported by NEDO as a part of the EUV mask program.

We have developed an actinic full-field inspection system to detect multilayer phase defects with dark field imaging capabilities. With this inspection system programmed phase defects on a mask blank were observed, and their image quality was compared with that from a proof of concept (POC) tool. The maximum intensity of normalized defect signal with the inspection system is 3.1 times larger and the full width at the half maximum (FWHM) of the defect signal is 13 % narrower than those with the POC tool. And therefore, the image quality of this inspection system is considered to be superior to that of the POC tool. In the case where the defect image is captured with stage scanning using time delay integration (TDI) method, degradation of defect signals caused by stage scanning is evaluated. With a scan velocity of 1mm/s, the defect signal indicates a 19 % decrease in the maximum intensity and a 13 % extension to the FWHM as compared with those from the static mode. We believe that this degradation of defect signal is caused by the variation of scan velocity and yawing of the scan stage. The relation between defect sensitivity and scan velocity is analyzed with signal to noise ratio (SNR). As a result, a scan velocity of 1mm/s plays a role that is barely sufficient to detect a 1.5 nm-high 60 nm-wide defect with no false defect detection. Noise reduction of CCD or improvement of inspection algorithm will be required.

The effect of mask absorber thickness on defect printability in EUV lithography was studied. In case of very thin absorber, when used for EUVL mask, it became necessary to set specifications for mask defects for the manufacturability of ULSI devices because mask absorber thickness could impact defect printability. We prepared programmed mask defects of LR-TaBN absorber with various thicknesses. We then investigated defect printability of thin absorber mask with Small Field Exposure Tool (SFET) by comparing the data with simulation results.

The availability of defect-free masks remains one of the key challenges for inserting extreme ultraviolet lithography (EUVL) into high volume manufacturing. The successful production of defect-free masks will depend on the timely development of defect inspection tools, including both mask blank inspection tools and absorber pattern inspection tools to meet the 22 nm half-pitch node. EUV mask blanks with embedded phase defects were inspected with a reticle actinic inspection tool (AIT) and the Lasertec M7360. The Lasertec M7360 is operated at SEMATECH's Mask blank Development Center (MBDC) in Albany, with sensitivity to multilayer defects down to 40~45 nm, which is not likely sufficient for mask blank development below the 32 nm half-pitch node. Phase defect printability was simulated to calculate the required defect sensitivity for the next generation blank inspection tool to support reticle development for the sub-32 nm half-pitch technology node. This paper will also discuss the kind of infrastructure that will be required in the development and mass production stages.

Due to potential applications of Extreme Ultraviolet Lithography (EUVL) to 22 nm half-pitch (hp) generations, EUVL is well researched. However, current SEMI standards about the chuck are based on only the local slope of roughness. Herein chuck standards, which consider the spatial frequency of the chuck surface roughness as well as the local slope of the shape, are proposed by examining the chuck roughness. To prevent a mask pattern shift when an EUVL mask is clamped by an electrostatic chuck, the roughness height must be limited. Thus, the in-plane distortion (IPD) and out-of-plane distortion (OPD) are introduced to evaluate the mask pattern shift. This research utilizes ANSYS to evaluate the relationship between the spatial frequency of chuck roughness and IPD/OPD induced on the mask surface after an EUVL mask is clamped by the chuck. The IPD depends on the local slope of the surface roughness shape of the electrostatic chuck (ESC) as well as the spatial frequency of the roughness. Therefore, re-polishing the chuck surface can decrease IPD. Moreover, the spatial frequency of roughness must be considered when a mask pattern shift correction is performed according to the surface roughness shape of the EUVL mask and ESC.

The use of an electrostatic chuck to support and flatten an extreme ultraviolet (EUV) mask during scanning exposure will be a critical component to meet the stringent requirements on image placement errors in the sub-30-nm regime. Consequently, the ability to predict the response of the mask during e-chucking is necessary for the design and implementation of the e-chuck system. This research focuses on characterizing the coefficient of friction between the EUV reticle and the dielectric material of the chuck. A customized tool was constructed to test chuck and reticle samples both in air and in a vacuum chamber. Studies were conducted to identify the friction coefficient at various chucking pressures and to examine the effects of wear caused by repeated measurements on the same location of the reticle surface. All experiments were performed in a cleanroom environment. Results of the friction testing illustrate the range of values to expect for typical EUV reticles and chucks. Finite element (FE) modeling was then used to illustrate the effects of friction on the overall capability of the chuck to flatten the mask. Additional FE simulations demonstrated the magnitude of the friction force needed to ensure that the reticle would not slip during the acceleration / deceleration loading seen in the scanning exposure process.

"Reticle protection during storage, handling and use" is one of the critical issues of EUV lithography because no practical pellicle has been found for EUV reticles as yet. The front surface of an EUV reticle has to be protected from particles larger than 20-30 nm to maintain the image quality projected on the wafer plane, and the backside also has to be protected to maintain the flatness of the reticle chucked on an electrostatic chuck (ESC). In this paper, we are focusing on particles on the backside of a reticle. If a particle lies between a reticle and a chuck, it has a strong impact on the flatness of the reticle, and the wafer overlay is degraded by out-of-plane distortion (OPD) and in-plane distortion (IPD) caused by the particle. From this point of view, we need to know the maximum allowable size of particles on the backside of a reticle. MIRAI-Selete introduced an experimental setup that can measure the flatness of the chucked reticle in a vacuum. Two electrostatic chucks were alternately installed in the vacuum chamber of Mask Protection Engineering Tool (MPE Tool), a reticle is automatically carried from a reticle pod to the chuck in the tool. The flatness of the reticle can be measured by an interferometer through the viewport underneath the chamber. We report results of experimental evaluation about the relationship between the reticle OPD and the initial size of particles and mention the maximum allowable size of particles between a reticle and a chuck.

Using an extreme-ultraviolet (EUV) microscope to produce high-quality images of EUV reticles, we have developed a new wavelength tuning method to acquire through-focus data series with a higher level of stability and repeatability than was previously possible. We utilize the chromatic focal-length dependence of a diffractive Fresnel zoneplate objective lens, and while holding the mask sample mechanically still, we tune the wavelength through a narrow range, in small steps. In this paper, we demonstrate the method and discuss the the relative advantages that this data collection technique affords.

We report the demonstration of Extreme Ultraviolet Holographic Lithography - EUV-HL - using a compact table top extreme ultraviolet laser. The image of the computer-generated hologram (CGH) of a test pattern was projected on the surface of a sample coated with a high resolution photoresist. Features with a 140 nm pixel size were printed using for the reconstruction a highly coherent table top 46.9 nm extreme ultraviolet laser. We have demonstrated that the combination of a coherent EUV source with a nanofabricated CGH template allows for the extension of nanolithography in an extremely simple set up that requires no optics. The reconstructed image of CGH was digitized with an atomic force microscope, yielding to reconstructions that are in excellent agreement with the numerical predictions.

It is very important to mitigate oxidation of multilayer mirrors (MLMs) and carbon deposition onto MLMs to extend the lifetime of EUV exposure tool. In order to estimate the lifetime, we have to figure out scaling law. Previous results at EUVA have shown that carbon deposition rate on MLMs is not proportional to every hydrocarbon partial pressure and every EUV intensity^3-4. In this study we focused on carbon deposition on Si-capped multilayer mirror. We made experiments of EUV irradiation to the MLMs using two different apparatuses. One is connected to a beamline (SBL-2) of synchrotron radiation facility Super-ALIS in the NTT Atsugi research and development center, and the other is connected to a beamline (BL9) of synchrotron radiation facility New SUBARU in the University of Hyogo. As the result of experiments, we found that different carbon deposition rate occurred on the different beamlines, although they have the same average EUV intensity. We present differences of carbon deposition rate on MLMs between two different beamlines and estimation of carbon deposition rate on EUV tool analyzing dependences of carbon deposition rate on characteristics of EUV source.

Extreme ultraviolet (EUV) lithography is one of the most promising candidates for device patterning at the 22 nm halfpitch node. The contamination of extreme ultraviolet optics has consistently been listed among the top challenges for the commercialization of EUV lithography. In a lithography exposure tool under radiation exposure, the two main mechanisms that degrade reflectivity of EUV molybdenum/silicon multilayer optics are carbonization and oxidation. The accumulation of carbon on the mirror surfaces is a consequence of residual hydrocarbons and/or other carbon containing molecules, while oxidation is likely due to water vapor. Theoretical and numerical modeling of EUV optics and mask contamination kinetics can provide valuable insight into reaction mechanisms and help identify favorable conditions that suppress contamination accumulation. However, the complexity of the underlying surface chemistry currently renders obtaining predictive quality challenging. We investigate the validity of different model assumptions and present preliminary numerical results on the dependence of contamination rates on key parameters including the effect of out-of-band radiation.

Si/Mo multi-layer mirrors are oxidized by a photochemical reaction with water gas and extreme ultraviolet (EUV) light. They do not have enough durability in EUV lithography tools. 14 types of capped mirror samples (SiO₂, TiO₂, V₂O₅, Cr₂O₃, Mn₂O₃, Y₂O₃, Nb₂O₅, RuO₂, Rh₂O₃, PdO, SnO₂, La₂O₃, CeO₂, WO₃-capped) have been investigated on the anti-oxidation property under the 150-1600J/mm² EUV irradiation at SR facilities. We have irradiated samples under the 1x10^-4Pa and 9x10^-4Pa water vapors. TiO₂, V₂O₅, Cr₂O₃, Nb₂O₅, CeO₂-capped mirror samples suppress reflectance drops and Si layers oxidation. These metal ions have similar radii. We have measured local structure of the RuO₂ layer with lower durability. The RuO2 layer is amorphous. This Amorphous RuO₂ layer loses the long range order of bonds and the short range order of the first shell. The Ru-O bonds remains with losing coordination number. To accelerate durability tests for a high volume machine, we have constructed a new dedicated beam line at the SAGA Light Source.

Since the k1 factor is much larger in extreme-ultraviolet lithography (EUVL) than in optical lithography, optical proximity correction (OPC) should be much simpler for patterns on EUVL masks than for those on advanced photomasks. This will facilitate the fabrication of complex device patterns with EUVL. In this study, static random-access memory (SRAM) cell patterns for the half-pitch (hp) 32- and 45-nm nodes were fabricated using two EUV exposure tools (SFET, EUV1), and their fidelity was evaluated. The levels of SRAM patterns were isolation, gate, contact, and metal. The size of the SRAM unit cell was 0.191 μm² for the hp 45-nm and 0.097 μm² for the hp 32-nm patterns. Most of the experiments employed SSR2, a high-resolution EUV resist. The high performance of the SFET and SSR2 enabled hp 45-nm SRAM patterns to be fabricated faithfully. However, some of the hp 32-nm patterns deviated from the mask patterns. To determine the causes of this degradation, we made a simulation analysis using the Sentaurus Lithography simulator. The main cause of the degradation was found to be resist blur. When we used MET-2D resist, which has a relatively large resist blur, the degradation became quite severe. Although the resist blur for SSR2 is about 10 nm, it is not small enough for the hp 32-nm SRAM patterns, especially for the gate and metal levels. It is necessary to reduce resist blur to improve the fidelity for this pattern size. Simulation results indicated that resist blur should be reduced to about 5 nm for hp 22-nm node device patterns.

Carbon contamination of extreme ultraviolet (EUV) masks and its effect on imaging is a significant issue due to lowered throughput and potential effects on imaging performance. In this work, a series of carbon contamination experiments were performed on a patterned EUV mask. Contaminated features were then inspected with a reticle scanning electron microscope (SEM) and printed with the SEMATECH Berkeley Microfield-Exposure tool (MET) [1]. In addition, the mask was analyzed using the SEMATECH Berkeley Actinic-Inspection tool (AIT) [2] to determine the effect of carbon contamination on the absorbing features and printing performance. To understand the contamination topography, simulations were performed based on calculated aerial images and resist parameters. With the knowledge of the topography, simulations were then used to predict the effect of other thicknesses of the contamination layer, as well as the imaging performance on printed features.

We present a computational and experimental study on interface passivation of B₄C/La multilayers for photolithography at wavelengths beyond 13.5 nm. We successfully applied N-plasma treatment to form interface-localized BN and LaN layers, preventing LaB₆ and LaC₂ interlayer formation and increasing the optical contrast. Experiments suggest an improvement of absolute reflection by up to 20% for 200 period multilayers, with a best-so-far result of 41.5 % at near-normal incidence of 6.7 nm.

As part of its role in providing radiometric standards in support of industry, NIST has been active in advancing extreme ultraviolet dosimetry on various fronts. Recently, we undertook a major effort in accurately measuring the sensitivity of three extreme ultraviolet photoresists. It has been common practice to use photoresists as a transfer "standards" to determine the intensity and uniformity of the radiation transmitted by extreme ultraviolet steppers. In response to preliminary results from Lawrence Berkeley National Laboratory that showed that two "standard" photoresists were almost twice as sensitive as had been previously believed, NIST carried out similar measurements and confirmed the Berkeley results. However, we have found that the assumed sensitivities are more a question of system calibration than of absolute resist dose sensitivity. We will describe the facility we used to make these measurements. Photoresists make less than perfect radiometers. They are very non-linear, sensitive to atmosphere, and difficult to calibrate. All of these characteristics led to the disparate results in assumed sensitivity values. We have developed an alternate wafer-plane dosimeter based on image plates. The dosimeter is linear over several orders of magnitude, comparatively insensitive to atmosphere, and can be re-calibrated as necessary. Moreover it can pass through a stepper as any other wafer. We will describe this dosimeter in detail

The development of EUV lithography is critically based on the availability of suitable metrology equipment. To meet industry's requirements, the Physikalisch-Technische Bundesanstalt (PTB) operates an EUV reflectometry facility at the electron storage ring BESSY II. It is designed for at-wavelength metrology of full-sized EUVL optics with a maximum weight of 50 kg and a linear dimension of up to 1 m. With the development of EUV lithography tools, the requirements for lower measurement uncertainty are steadily increasing. For small test samples at near normal incidence, a total uncertainty of 0.10 % for peak reflectance is achieved with a reproducibility of 0.05 % and the uncertainty in the center wavelength of 2 pm is mainly given by the uncertainty for the reference wavelength of the Kr 3d5/2-5p resonance. For real optical elements like PO-box mirrors and collectors for EUV pulsed plasma sources it is also essential to measure at the exact location on the mirror because of gradients in the layer thickness and also to measure at the correct local angle of incidence (LAOI) which may deviate significantly from normal. Thus alignment becomes critical for achieving low measurement uncertainties. Here we present PTB's experience in measuring large EUV optical components.

Carbon contamination layers, deposited on extreme ultraviolet (EUV) multilayer mirrors during illumination were characterized ex situ using spectroscopic ellipsometry (SE), laser generated surface acoustic waves (LG-SAW), and by their EUV reflectance loss. We show SE is more sensitive to the deposition of carbon layers than the EUV reflectance loss, even in the presence of the highly heterogeneous structure of the multilayer. SE has better overall sensitivity, with a detection limit of 0.2 nm, while LG-SAW has an approximate detection limit < 5 nm.

In extreme ultraviolet lithography (EUVL) a reflective mask is illuminated obliquely and the illumination is partially coherent. Due to the small NA (0.25) and sigma (0.5) the incident angles do not vary too much throughout the source distribution, but, unlike in the optical case, the topography is rather pronounced. Moreover the multilayer reflectivity varies significantly even for small variations of the incident angle. So as a result the object spectrum will not only be shifted as a function of the source point, but amplitudes and phases will also vary significantly. On the way to more advanced technology nodes, NA needs to increase up to 0.5, and effects induced by partially coherent illumination could be critical and must be appropriately modeled and investigated. In this paper the impact of the real source distribution on EUVL imaging is investigated. For this a rigorous electro-magnetic field solver is used to predict the subtle effects associated with the three-dimensional topography of the mask absorbers. We introduce the advanced topographical mask illumination concept for rigorous and fast simulation of EUVL mask under partially coherent illumination. Rigorous simulations are performed for line and spaces with an outlook to future technology nodes.

The two key factors in EUV lithography imaging will be flare and shadow effect among other issues. The flare which is similar to the long range density loading effect and also known to be of high level will generate CD variation throughout the exposure field while the EUV specific shadow effect differentiates H-V CDs along the slit. The long range character of flare in EUV full field scanner can even affect CDs in the neighboring fields. It seems to be apparent that the major imaging challenges for EUV lithography to be successfully adopted and applied to device manufacturing will be determined by how smartly and effectively CD variations induced both by flare and shadow effect in the full chip level are compensated. We investigated and assessed the previously proposed full chip level compensation strategies of the flare and shadow effect in EUVL for the application to memory device both by simulation and experiments on the condition of full field scanner. The effectiveness of flare compensation for the case of thin absorber mask was also addressed together with related impact on the shadow induced H-V CD bias.

Extreme ultraviolet lithography (EUVL) is believed to be possible patterning technology which can make 22 nm and below. EUV uses a reflective mask so that the mask is shined with the oblique incident light. Thus, the study of incident angle effect is very important. Currently, 6 degree oblique incidence is main stream, but 5 degree incident angle is also studied for 0.25 NA. Incident angles larger than 6 degree are also considered for larger NA. This incident angle will affect many things, eventually to the line width. Shadow effect also strongly depends on the incident angle. This shadow effect in the EUVL mask is an important factor that decreases the contrast of the aerial image and causes a directional problem, thus it will make line width variation. The off-axis illumination (OAI) will be used with conventional on-axis illumination to make much smaller patterns. This OAI will split the main beam and change the incident angle. We found that if the incident angle increased with higher degree of coherence, the aerial image went worse. The CD difference between the horizontal and the vertical pattern is also dependent on the degree of coherence even though it is small.

One of the major issues introduced by development of Extreme Ultra Violet Lithography (EUV) is high level of flare and shadowing introduced by the system. Effect of the high level flare degrades the aerial images and may introduce unbalanced Critical Dimension Uniformity (CDU) and so on. Also due to formation of the EUV tool, shadowing of the pattern is another concern added from EUVL. Shadowing of the pattern will cause CD variation for pattern directionality and position of the pattern along the slit. Therefore, in order to acquire high resolution wafer result, correction of the shadowing and flare effect is inevitable for EUV lithography. In this study, we will analyze the effect of shadowing and flare effect of EUV alpha demo tool at IMEC. Simulation and wafer testing will be analyzed to characterize the effect of shadowing on angle and slit position of the pattern. Also, flare of EUV tool will be plotted using Kirk's disappearing pad method and flare to pattern density will also be analyzed. Additionally, initial investigation into actual sub 30nm Technology DRAM critical layer will be performed. Finally simulation to wafer result will be analyzed for both shadowing and flare effect of EUV tool.

At Selete, correction for flare based on a flare point-spread function (PSFF) is investigated. We divide a layout into a grid and calculate pattern density for each grid square, obtaining a density array as an approximation to the layout aerial image. Then, the density array is convolved with the PSFF to create an array of flare values. Using this flare-value array, we resize the layout. In the above correction flow, size of a grid square of density array and a selection of an approximate function of the PSFF have a great influence on the accuracy of flare value computation. In this study, correction for flare was applied to the fabrication of several test masks using the real PSFF obtained from a full-field step-and-scan exposure tool called EUV1. We report on the optimization of size of grid square, on a suitable approximation model of PSFF, and on feedbacks from exposure experiments.

Photoresist outgassing and the related risk for optics contamination in extreme ultraviolet (EUV) exposure tools are concerns in the development of EUV lithography, especially towards the high volume manufacturing tools. The measurement however of how much and what species are outgassing/contaminating, is still very challenging. Various techniques are investigated worldwide, but there is still no consensus on which technique is most adequate. Moreover, since the outgassing/contamination qualification of photoresists needs dedicated tool set-up, it is likely that the testing configuration (with parameters such as exposure intensity, background vacuum quality, pumping speed, ...) can impact the measurement result. In this paper, we are comparing two candidates for outgassing/contamination measurement which are integrated in one experimental set-up : RGA (Residual Gas Analysis) and witness plate testing. RGA is based on in situ mass spectrometer measurements during photoresist EUV exposure and enables chemical identification of species that are outgassing, but has limited information on the probability of mirror contamination. Results are shown on how the measurement results can depend on the testing configuration. Witness plate testing is based on the evaluation of EUV exposed mirror samples that are placed in the vicinity of EUV outgassing photoresist. Results are shown on how the generated contamination can be affected by the tool configuration, and on how to measure/analyze the contamination. Finally, since both techniques are integrated in one test-set-up, measurement results will be compared and correlated, which should help in understanding the phenomena and lead to well defined measurement for photoresist qualification.

The effect of higher film quantum yields (FQYs) on the resolution, line-edge roughness, and sensitivity (RLS) tradeoff was evaluated for extreme ultraviolet (EUV, 13.5 nm) photoresists. We determined the FQY of increasingly high levels of an iodonium photoacid generator (PAG) using two acid detection methods. First, base titration methods were used to determine C-parameters for acid generation, and second, an acid-sensitive dye (Coumarin-6) was used to determine the amount of acid generated and ultimately, to determine absorbance and FQYs for both acid detection methods. The RLS performance of photoresists containing increasing levels of PAG up to ultrahigh loadings (5-40 wt% PAG) was evaluated. RLS was characterized using two methods: • K_LUP resist performance •Z-Parameter (Z = LER²*Esize*Resolution³)

As lithographic technology is moving from single pattern immersion processing for 45nm node to double patterning for the next generation and onward to EUV processing, TEL is committed to understanding the fundamentals and improving our technology to enable customers to meet roadmap expectations. With regards to immersion and double patterning technology, TEL has presented a wide variety of technologies to advance the processing capability of our customers. With regards to EUV technology, we have previously presented work for simulation and modeling of an EUV resist system1 in order to further our understanding of the differences between resist performance from previous platforms and currently available EUV resists. As it's currently unknown which direction resist suppliers will take with regards to platform in order to surpass the current limitations in resolution, roughness and sensitivity trade off's, we need to consider the implications of such kinds of novel platforms to track processing capabilities. In this work, we evaluated two of the more promising materials, to determine processing sensitivities necessary for the development of new hardware and process applications. This paper details the initial study complete for understanding the track process parameters such as dissolution characteristics and the impact of film hydrophobicity. Fundamental processing knowledge from 193 and 248nm technology is applied to understand where processing deviates from known sensitivities and will require more development efforts.