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Microelectronic Manufacturing Yield, Reliability, and Failure Analysis III
Editor(s): Ali Keshavarzi; Sharad Prasad; Hans-Dieter Hartmann

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Volume Details

Volume Number: 3216
Date Published: 11 September 1997

Table of Contents
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Quick kill passivation integrity study
Author(s): Karl Huber; Simon Gonzales
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Unique case study of low yield analysis of 1.5-um BiCMOS technology
Author(s): C. S. Teoh; James Lin
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Characterization of environmental halogen molecule contamination-induced pad surface corrosion
Author(s): Po-Tao Chu; Ching-Wen Cho; Hung-Chi Hsiao; Jie-Shin Wu; Chih-Chien Hung; Ying-Chen Chao
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Statistical multilot characterization of spatial thickness variations in LPCVD oxide, nitride, polysilicon, and thermal oxide films
Author(s): Edwin T. Carlen; Carlos H. Mastrangelo
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Technology mapping for hot-carrier reliability enhancement
Author(s): Zhan Chen; Israel Koren
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Yield-enhanced routing for high-performance VLSI designs
Author(s): Arunshankar Venkataraman; Howard H. Chen; Israel Koren
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Automatic final inspection: an important nonexpensive control to guarantee long-term reliability
Author(s): Friedbald Kiel; Guiseppe Balbo; Eyal Duzi; Olga Andrianaivo-Golz; Thomas Kohnen
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Evaluation of pad life in chemical mechanical polishing process using statistical metrology
Author(s): N. Moorthy Muthukrishnan; Sharad Prasad; Brian Stine; William Loh; Ron Nagahara; James E. Chung; Duane S. Boning
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Effect of cycle time and fab yield variation on the number of wafer outs variability: a Monte Carlo case study
Author(s): Carlos Ortega; Javier Bonal; Javier Conde Collado
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Die allocation optimization for yield improvement
Author(s): Carlos Ortega; Miguel Recio; Alfonso Urquia; Guillermo Sanchez; Ubaldo Nogal; Alfonso Badillo
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Knowledge-based software system for fast yield loss detection in a semiconductor fab
Author(s): Victorino Martin Santamaria; Miguel Recio; Miguel Alonso Merino; Julian Moreno; Almudena Fernandez; Gerardo Gonzalez; Guillermo Sanchez; Luis J. Barrios; Maria D. del Castillo; Lissette Lemus; Angel L. Gonzalez
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STADIUM SOI reliability simulator for the analysis of hot-electron and ESD-induced degradation in nonisothermal devices
Author(s): David Lee; Thomas J. Sanders
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Automated redundant via placement for increased yield and reliability
Author(s): Gerard A. Allan; Anthony J. Walton
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Defect cluster analysis to detect equipment-specific yield loss based on yield-to-area calculations
Author(s): Christopher Hess; Larg H. Weiland
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Coupling between hot-carrier degradation modes of pMOSFETs
Author(s): Vijay Janapaty; Bharat L. Bhuva; N. Bui; Sherra E. Kerns
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Statistical effects of plasma etch damage on hot-carrier degradation
Author(s): Bharat L. Bhuva; Vijay Janapaty; N. Bui; Sherra E. Kerns
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Arc-induced gate oxide breakdown in plasma etching process
Author(s): Jungwoo Song; Heegee Lee; Jung Hoon Lee
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Investigations of mechanical stress and electromigration in an aluminum meander structure
Author(s): Xiaoying Yu; Kirsten Weide
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Modeling of defect propagation/growth for yield impact prediction in VLSI manufacturing
Author(s): Xiaolei Li; Andrzej J. Strojwas; Aaron L. Swecker; Mahesh Reddy; Linda Milor; YungTao Lin
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Failure rate estimation in the case of zero failures
Author(s): David J. Meade
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Die-counting algorithm for yield modeling and die-per-wafer optimization
Author(s): Gregg D. Croft; Robert L. Lomenick; Douglas L. Youngblood; Jeffrey M. Johnston
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