Draper Laboratory, using silicon microfabrication techniques to achieve high yields by batch processing, has been developing miniature microelectromechanical instruments for over 10 years. During this time, considerable progress has been made in the development and fabrication of micromechanical gyroscopes, accelerometers, and acoustic sensors. Inertial instruments have become a worldwide research and commercial topic. Draper gyroscopes and accelerometers have been fabricated with measurement ranges from 50 to 500 deg/s and 10 to 100,000 g, respectively. In gyroscopes, stabilities are 20 deg/h in room temperature tests and 4.4 deg/h applying 0.3 degrees C thermal control. For accelerometers, less than 1 mg has been demonstrated in room temperature tests. These units have performed successfully across a temperature range of -40 to 85 degrees C, and have survived 80,000- to 120,000-g shock tests along all axes. Continuing development activities are expected to yield over an order of magnitude in performance enhancement. These micromechanical instruments are built using a silicon wafer process that results in crystal silicon structures that are anodically bonded on a Pyrex substrate that contains sensing and control electrodes. This silicon-on-glass configuration has low stray capacitance, and is ideally suited for hybrid or flip-chip bonding technology. Draper's inertial sensors incorporate excellent fabrication, however, building the silicon and Pyrex sensor chip is only one of many important contributions in a complete sensor system. Other equally important steps include: 1) electronics and application-specific integrated circuits (ASICs) 2) packaging, 3) test, and 4) modeling and analysis. This presentation focuses on sensor fabrication. Draper's accelerometers and gyroscopes and the dissolved wafer fabrication process are described. The evolution of gyro design, fabrication, and performance is summarized. Garnered through experience in both conventional and micromachined inertial sensors, rules of thumb that have guided Draper's micromachining efforts are discussed.

Dry etching and micromachining with laser radiation of short wavelength and pulse length are investigated to present their process capabilities for the production of surface structures within precision silicon components. The laser dry etching processing with excimer laser radiation is modified by using a microwave-excited processing gas. Furthermore, methylmethacrylate is additionally used to study the influence of polymerization on the etched structures. The micromachining with frequency-doubled Nd:YLF laser radiation is performed yielding more precise structures during drilling and caving due to the lower heat and pressure load during the interaction time. The processes involved in dry etching and micromachining with laser radiation are studied by high-speed photography, mass spectroscopy and optical spectroscopy, whereas the produced structures are analyzed by profilometry, optical and electron microscopy as well as electron spectroscopy such as XPS and AES. The results are discussed in view of applications for surface patterning of precision silicon components.

The deep etch-shallow diffusion process has been applied to the fabrication of comb drive resonators and micromirrors successfully. Etch rate of Si with various doping concentrations in a Cl₂ plasma generated by an electron cyclotron resonance source and B diffusion in high aspect ratio Si trenches were characterized. It was found that lightly B and P doped Si were etched at similar rates of 0.17 micrometers/min, whereas heavily B doped p⁺⁺Si had a slower etch rate of 0.16 micrometers/min and heavily P doped n⁺⁺Si had faster etch rate of 0.31 micrometers/min. Typical etch conditions are 100 W microwave power and 100 W rf power at 3 mTorr, with 20 sccm of Cl₂ flow and a source to sample distance of 8 cm. The difference between the p⁺⁺ and n⁺⁺Si rate was more significant when etched at higher microwave power, higher rf power, or higher temperature. The depth of a heavily B doped Si layer was measured for different feature sizes, trench openings, and aspect wide trenches to 1.5 micrometers at the bottom of 2 micrometers wide trenches. The diffusion layer on the sides of the trenches for a 30 min B diffusion was 3.25 micrometer thick and it is independent of the trench opening and the trench aspect ratio.

First piezoresistive AFM sensor developed by Quate was based on SOI technology. Alternative technology for fabrication of microtips integrated with silicon cantilever beam, used as a microprobe in atomic force microscopy, is described in this paper. It is based on a bulk micromachining to define the cantilever thickness, surface micromachining to develop sharp tip and standard IC planar processing. Specific sequence of plasma treated photoresist and hard masking steps followed by wet isotropic, wet anisotropic and dry etching is utilized to obtain very sharp silicon tips. First, HF/HNO₃ based polishing etchant is used to create mesa islands at the end of the formed cantilever. Next, a planar IC processing sequence is realized to fabricate piezoresistive Wheatstone bridge which will serve as a force sensing element. Thickness of the beam is precisely controlled by electrochemical etch-stop technique in. Then, sharp tip is formed by both RIE and/or wet etching, using under-cutting method. Finally, deep anisotropic silicon etching combined with SF₆/Ar plasma etching is used to create cantilever silicon beam.

In the field of micromachining dry etching processes of silicon are getting more and more important in view of applications. By means of RIE processes it is possible to achieve structures with a very high aspect ratio. This is interesting especially in comparison with the well known but expensive LIGA technique. Unfortunately the anisotropy of the profile in silicon depends strongly on different process conditions. Therefore experiments were carried out with variations in the gas composition, the plasma power and the mask materials. All investigations were made in a 310-type machine from STS. The gas composition was made of SF₆, O₂ and CHF₃. The flow rate of these gases was varied in a wide range. The power of the plasma was hanged from 75W up to 600W at a frequency of 13,56MHz. Aluminium, copper, nickel and chromium were used as masking materials. The width of the patterns was in a range of > 20 micrometers. In contradiction to results known from literature it was not simple to achieve structures with vertical sidewalls. Using aluminium as materials, the sidewalls were rounded independent of the power and the composition of the gas. In some cases a small redeposition was observable at the bottom of the structures. A kind of microgas was observed, too. Copper showed high etch rates in some gas compositions and at defined power conditions. Therefore a complete removing of the masking layer was observed in some cases. Some material was redeposited in the transition zone between the sidewalls and the bottom. The structures showed rounded edges and no vertical sidewalls. A higher redeposition rate was found using nickel as masking material. Unfortunately this redeposition occurred at the bottom of the structures. This is measurable in a decrease of the etch rate. The structures are rounded with a kind of vertical sidewalls. Anisotropic structures with vertical sidewalls were observed with chromium as mask layer. The anisotropic etch behavior with a high aspect ratio was achieved only in a small range of the gas composition and the plasma power.

The planarization technology of chemical-mechanical- polishing (CMP), used for the manufacturing of multilevel metal interconnects for high-density integrated circuits, is also readily adaptable as an enabling technology in micro- electro-mechanical systems (MEMS) fabrication, particularly polysilicon surface micromachining. CMP not only eases the design and manufacturability of MEMS devices by eliminating several photolithographic and film issues generated by severe topography, but also enables far greater flexibility with process complexity and associated designs. Thus, the CMP planarization technique alleviates processing problems associated with fabrication of multilevel polysilicon structures, eliminates design constraints linked with non- planar topography, and provides an avenue for integrating different process technologies. Examples of these enhancements include: a simpler extension of surface micromachining fabrication to multiple mechanical layers, a novel method of monolithic integration of electronics and MEMS, and a novel combination of bulk and surface micromachining.

Micromachined silicon sensors often exhibit curvature of released membrane structures due to internal stresses, doping gradients, and crystalline defects. This curvature can be a significant source of error in inertial sensors such as accelerometers and gyroscopes. Development of process conditions that reduce curl requires a rapid, accurate method for obtaining high-resolution flatness data over a complex two-dimensional surface. This work reports on the use of a commercially-available, nondestructive optical characterization tool that provides high-resolution profiles of micromachined structures. This interferometry technique is shown to be a significant extension of traditional process development tools, such as scanning electron microscopy (SEM) and test structures. Statistical information on flatness of test structures, accelerometers, and gyroscopes is reported as a function of processing conditions. Unexpected and previously undetected phenomena are revealed by the interferometry measurement. Optimization of the diffusion-annealing cycle provides structures that are flat to within 0.1 micrometers. The flatter parts now being produced have contributed to recent advances in the performance of Draper Laboratory's inertial sensors.

Al and Cr cantilever microbeams, microbridges and suspended microrings were fabricated by isotropic etching of silicon with a SF₆/O₂ plasma after film patterning. They were used for the characterization of both compressive stress, extensive stress and stress gradients in the metallic films. It is shown that valid residual stress measurements with such micromechanical devices must take into account stress changes due to process fabrication, underetching at the clamped ends, edge effects and stress gradients. This is demonstrated by bucking threshold measurements of microbridges and microrings of various sizes and 3D finite element linear static and linear buckling analyses including underetching or stress gradients. Cantilever microbeam profile measurements shows that temperature rise during etching must be carefully minimizes to avoid thermally induced stress gradients. Stress gradients in the deposited films have no effect on microbridges critical buckling stress but lead to a distortion of the microrings before the occurrence of buckling.

This paper presents the development of a new technique to prevent occurrence of compressive stress in epipoly. The use of an epitaxial reactor to grow polysilicon enables the growth of monocrystalline silicon (for bipolar electronics) and polysilicon on top of oxide (for MEMS) in a single deposition step. However, after bipolar processing the early structures show compressive strain in the epipoly layer, which required careful MEMS design. We have found the cause of this compressive strain to be the oxidation steps in the bipolar process. The occurrence of this strain can be explained by the presence of oxygen in the epipoly. An alternative processing technique, where the epipoly is doped using implantation and shielded from oxygen by a nitride layer during further bipolar processing, yields epipoly layers without compressive strain. The full thermal budget of the bipolar process is used to diffuse and activate the implanted epipoly dopant.

This study is based on the future realization of phase shifters for planar antennas. Phase shifters include Poly-Si microswitches taking the place of usual PIN diodes. The microswitch consists of a cantilever beam, a contact electrode and a control one. For the time being, undoped polysilicon cantilevers are produced on monosilicon substrate by surface micromachining in order to test the feasability of the process. The latter comprises a silicon dioxide sacrificial layer elaborated with magnetron rf sputtering, a LPCVD polycrystalline silicon layer and a removal of the sacrificial oxide layer by lateral etching hydrofluoric acid to undercut the polysilicon layer completely. SEM observations show an upward deflection at the end of the cantilever due to film stress gradient and also adherence between device and substrate. Strain relaxation measured by beam contraction decreases when the cantilever width increases.

In recent years a number of micro machining processes have been developed suitable for the realization of industrial process applications, whereby the LIGA technique is considered to be one of the most promising and flexible technologies for the large scale fabrication of three- dimensional microstructure products. LIGA is based on the combination of deep lithography, and electroforming to realize mold inserts with high accuracy for the mass fabrication of microcomponents made from plastic material. The present report deals with the development of micromolding technologies which are applied at IMM. Specifically they are focused on the small dimensions of the molded microstructures, the high aspect ratio, and the demand for sub-micron precision. This includes the technical implementation of molding processes, the production of suitable micro mold inserts, the investigation in simulation software, the screening of polymer materials, ceramics, metallic powders or preceramic polymers and the development of quality qualification systems. The potential of micro molding processes will be demonstrated by presenting a variety of applications like micro gear wheels, micro pumps, micro optical components, splices and connectors, waveguides, optical gratings and components for chemical and biological micro reactors.

The LIGA process, invented in Germany and being further developed at Louisiana State University can be used to economically mass produce high aspect ratio microstructures (HARM) by molding. The template, or mold insert, is required to mold microstructure and is fabricated by a two step sequence of x-ray lithography and electroplating. A modified version of the LIGA process has been used to produce a mold insert. A sheet of PMMA is first patterned using x-ray lithography. After the lithography process is completed, the PMMA sheet is clamped to a nickel substrate and a subsequent electroplating step produces a mold insert. This processing sequence eliminates the need to establish a chemical bond between the resist and the substrate. The electroplated HARM were used as a mold insert in subsequent molding experiments. One mold insert which was fabricated is presented, along with the results of molding experiments using a similar insert.

Interest in thick photoresist applications is steadily growing. Besides the bump fabrication and wire interconnect technology, the process of patterning thick layer photoresists by UV lithography is specially qualified for applications in microelectro-mechanical-systems (MEMS). Specialized equipment and new photoresists have been developed or are under development to cope with the new challenges in the field of preparing extremely thick photoresist layers, the process of patterning these thick resists, and to deal with the difficulties of the following galvanoplating step. As one of the most critical steps in thick photoresists processing, the baking procedure was investigated. Two positive tone photoresists were processed by means of three different baking methods: air-forced oven, ramped hotplate, and IR radiation. Furthermore, combinations between the methods were tested. It could be shown that IR baking is advantageous compared to the other methods with respect to process duration and energy consumption. Compared to edge steepness, resolution, edge loss, and surface roughness, all methods deliver nearly same results. A minimum width of 2-3 micrometers for the resist bars was found to be necessary to withstand the fabrication process of lines and spaces in about 15 micrometers thick resist. For thicker layers high aspect ratios of more than 10 as well as steep edges of more than 88 degrees could be fabricated. The resist patterns can be molded by using electroplating.

The suitability of pattern transfer through multi-component chemically amplified resists (CARs) has been studied. We report on direct-write electron-beam lithographic and reactive ion etching (RIE) experiments with single-layer CARs used for the fabrication of silicon structures with sizes from micro- down to submicrometer scale and high aspect ratio. The 30 keV e-beam response of new types of CARs in thicker layers and the optimization possibilities of the exposure and etching conditions were investigated as well. We measured the basic characteristics of used resists and also the influence of proximity effects. The study includes the effects of resist process variations on the global 3D resist-relief structure. The resolved resist- relief structures at optimized process conditions have shown high aspect ratios with nearly vertical sidewalls. The paper will discuss the deep pattern transfer results into the underlying SiO₂ and/or directly into Si-substrate by using RIE. The results show an etch that has excellent vertical sidewalls free of passivation, and is anisotropic.

In this work, we have developed a simple method to fabricate 3D microstructures which eliminates the use of photoresist as molding material. Our method of pattern transfer exploits the anisotropic etch of silicon using EDP or TMAH which allows fabrication of unique structures that would have not been possible by the photoresist-mold method. In this technology the etched silicon substrate itself is used as the mold for subsequent electroplating process to deposit metallic material such as gold, nickel, or iron-nickel alloy. These electroplated microstructures can be easily removed from the silicon mold by choosing an appropriate seed layer which gives poor adhesion to silicon or silicon dioxide substrate. Using this technology metallic microstructures with thicknesses of 300 micrometers has been fabricated to demonstrate the feasibility. We have also fabricated a sharp tip, pyramidal structures suitable for ionization detectors in an integrated micromachined gas chromatographic system.

This paper reviews recent developments in micromachining technologies for the fabrication of microsensors, microactuators, and integrated microsystems, and discusses the requirements that micromachining technologies have to satisfy for many present and emerging applications. First, the paper discusses the challenges that micromachining technologies have to overcome and features that they have to provide for many future applications. Micromachining technologies have to be simple so that high yield and low cost can be achieved in manufacturing , they have to be capable of producing microstructures with a variety of shapes and sizes in all three dimensions, many of them have to be compatible with integration with electronics, they have to be capable of providing packaging and encapsulation at the wafer level for many devices that require operation in hermetic and/or vacuum environments, and finally they have to be capable of supporting a mixed set of materials, technologies and devices. Significant progress has been made in all of these areas during the past few years and several groups have developed new techniques that satisfy some or all of these requirements. The paper also reviews the most recent advances in the three mainstream technologies of bulk silicon micromachining, surface micromachining, and electroplating techniques. As microsystems become more complex, these three mainstream technologies will be increasingly used and combined to build complex systems at low cost.

A new pressure-activated silicon micromachined poppet valve design and fabrication process are presented for automotive fuel applications. Although non-electrically activated, micromachining provides a physical structure which is difficult or expensive to achieve with conventional method machined parts. Bulk etching is used to fabricate an octagonal silicon diaphragm which moves in response to the inlet fluid pressure. Silicon direct bonding is used to combine two layers, one with an inlet flow chamber and valve boss, and a second with a movable diaphragm and valve seat. The outlet side of the diaphragm includes a spring locator to position a counter-force mechanical spring. The diaphragm's burst pressure is reduced and varies greatly depending on the alignment of the clamping edges above and below the diaphragm.

Results are presented supporting the use of supercritical carbon dioxide (SCCO₂) drying to enhance the yield of surface-micromachined micromechanical devices following the final release etch. The equipment and extraction process of the SCCO₂ system are described, and results of successfully released cantilevered beams and microengines are presented. A new system capable of drying 6 inch wafers is also described.

The design and fabrication process of fully self-aligned nickel electrostatic wobble micromotors with stators overlapping above rotor are reported. The micromotors were fabricated using quasi-LIGA technology, in which the electroformed nickel as a structural material for stators, rotor and bearing, and electroformed copper as a sacrificial and self-aligned layer to obtain small gap between moveable and stationary parts were used. In addition, all the key fabrication processes were at low temperature. The experimental gap between rotor and stators, rotor and bearing is 2.5 and 1.3 micrometers, respectively. The experiments show that the micromotors wobble at a bias of 15V, and rotate continuously at bias of 30-55 V. It is found that the rotation speed and gear ratio depend on the frequency and voltage of pulse bias.

Tetramethyl ammonium hydroxide (TMAH) solutions have been used to realize IC-compatible micromachined structures and device isolation. THe very low etch rate of PECVD dielectric layers and the possibility to passivate the aluminum metalization by doping the solution with silicon, increase the range of applications of this etchant and simplify both the post processing and the etch set-up configuration. Solutions of TMAH and water with addition of solid silicon or silicic acid have been used to study the effect of solution saturation on the passivation of aluminum. The etch rate of silicon, selectivity to masking materials and quality of the etched surfaces has been evaluated in both types of doped solutions in the temperature range 70 degrees-90 degrees C. An etch rate of less than 10nm/hr for the Al/1 percent Si metal layer has been measured in the saturated solutions. Further, the use of additives, such as IPA and pyrocatechol, on the etchant characteristics has been investigated. The addition of IPA has little or no influence on the etching characteristics, while very little quantities of pyrocatechol are sufficient to cause major improvements on the etching uniformity and surface quality, with no negative effect on the aluminum passivation.

Low thermal expansion metal such as Invar is suitable for MEMS application, where the dimension stability requirement is very high over a wide temperature range. Invar electrodeposition process was developed as a method to fabricate Invar structure. The effect of plating parameters were investigated to develop optimized Invar deposition process. The Invar film obtained in this research has the thermal coefficient of expansion as low as 6.3 PPM/K, which is almost half of that of pure nickel. The process compatibility to the rest of MEMS fabrication process was proved through the prototyping of a microstructure.

To develop a selectively grown silicon oxide film with low stress for micromachined devices, a novel liquid-phase- deposition (LPD) technique is proposed. LPD-oxide can be grown as the supersaturated concentration of Si(OH)₄ reaches a low-limit. The concentration can be controlled y the deposition temperature and the quantity of boric acid (H₃BO₃) added. Owing to the difference in low-limit between Si and photoresist, a selective LPD process window is thus formed. The selective-growth mechanism has been proposed and confirmed. Detailed understanding is instructive to apply the technology to MEMS devices and microfabrication.

A simple anodic bonding test is presented. This test can be used to study the anodic bonding process or used to control the quality of processed wafers. The test consists of simple test structures that have been fabricated on the silicon wafer. In this way, small cavities with different dimension are defined by a single RIE process. The anodic bonding occurs as a consequence of the high level of electrostatic pressure applied during the process. The electrostatic pressure pulls the two surfaces of the cavity into intimate contact. Depending on the stiffness of the cavities, determined by their dimensions, they will be bonded or not. The bonding process and quality can be monitored by the measurement of the size of the smallest bonded cavity and the distance between the bonded area and the border of the cavity. The test has been validated by the study of the influence of the depth of the cavities and the influence of the geometry of the glass electrode. The test presented gives more information about the anodic bonding process than the other characterization techniques. Moreover, this electrostatic test is non-destructive, it is very easy to implement on processed wafers and no special set-up is needed for measurements. The new electrostatic anodic bonding test is very promising as a simple method to increase knowledge of the phenomena.

The methods used to fabricate silicon optical modulators (MARS) devices in several material systems are described. Experimental results showing low bit-error-rate performance at 3.5 Mbit/sec. with a broad optical spectrum are presented.

Recently, a great deal of interest has developed in manufacturing processes that allow the monolithic integration of microelectromechanical systems (MEMS) with driving, controlling, and signal processing electronics. This integration promises to improve the performance of micromechanical devices as well as lower the cost of manufacturing, packaging, and instrumenting these devices by combining the micromechanical devices with a electronic devices in the same manufacturing and packaging process. In order to maintain modularity and overcome some of the manufacturing challenges of the CMOS-first approach to integration, we have developed a MEMS-first process. This process places the micromechanical devices in a shallow trench, planarizes the wafer, and seals the micromechanical devices in the trench. Then, a high-temperature anneal is performed after the devices are embedded in the trench prior to microelectronics processing. This anneal stress-relieves the micromechanical polysilicon and ensures that the subsequent thermal processing associated with fabrication of the microelectronic processing does not aversely affect the mechanical properties of the polysilicon structures. These wafers with the completed, planarized micromechanical devices are then used as starting material for conventional CMOS processes. The circuit yield for the process has exceeded 98 percent. A description of the integration technology, the refinements to the technology, and wafer- scale parametric measurements of device characteristics is presented. Additionally, the performance of integrated sensing devices built using this technology is presented.

GaAs is for many people regarded as being too difficult and expensive for a sensor or actuator application. It is a fact that GaAs is not cheap in comparison with silicon and also cannot currently be produced with as high purity and few crystalline defects as Si. Therefore, it is preferable to use GaAs where and when one can take advantage of the good properties that it possesses. Possible applications could be where high working-temperature, high frequency, integrated optoelectronics or piezoelectricity are demanded. As for silicon, gallium arsenide based microsystems should be manufactured on industrial production lines, with an additional post-processing for microsystem specific structures. Thus, using the same approach applied to silicon, CMP investigates gallium arsenide micromachining techniques using the Philips Microwave Limeil HEMT and the Vitesse MESFET foundry processes. This paper treats the advantages and disadvantages of gallium arsenide as a micromechanical material in comparison with silicon and quartz. The MESFET and HEMT compatible micromachining will also be detailed.

In this work the development of a design and manufacturing methodology for application-specific integrated sensor systems in silicon, that extends the ASIC standard cell approach for circuits, is presented. The standard design environment of a commercial foundry is used. A library of micromachined sensors and specific interface circuit cells has been added to the foundry's libraries. A fabrication structure has been set up in which the CMOS foundry process is followed by a micromachining post-processing transparent to the user. This includes back-side membrane fabrication. A number of standard sensor cell types have been developed: ISFET chemical sensors, gas flow and infrared radiation sensors based on thermopiles and piezoresistive pressure sensors. Mass-beam structures suitable for accelerometer devices have also been fabricated.

In recent years, machine facilities for Electro Discharge Machining (EDM) have been dramatically improved. Enormous progress has been obtained with respect to form accuracy and structure precision even in the submicron domain, which qualifies EDM as a technology for microfabrication ((mu) EDM). (Mu) EDM therefore extends the family of existing microtechniques e.g. the LIGA process or silicon surface micromachining. The EDM-technology offers 3D microfabrication of conductive materials independent of their mechanical properties like hardness, brittleness, etc. This capability offers new fields of application for the microfabrication of components made e.g. from stainless steel or titanium. In order to demonstrate the successful application of various (mu) EDM processes components and devices like micro gearwheels, microreactors, micro punching tools and mould inserts for micro injection molding of an optical fiber connector are presented, which have been fabricated by EDM in close cooperation between the Institute of Microtechnology Mainz GmbH and the Swiss EDM-manufacturer AGIE Losone. Based on their know-how the partners aim to optimize (mu) EDM for microfabrication purposes.

A commercially available electron cyclotron resonance etcher has been used to develop deep silicon trench etch processes using SF₆-O₂ chemistries. It was found that the etch rate depends primarily on the delivery of reactant. Aspect ratio dependent etching is more evident in this chemistry than it is in chlorine-based chemistries. Selectivity of the silicon etch rate to the silicon dioxide mask etch rate is determined mostly by the influence of etch power on the silicon dioxide etch rate. Etch anisotropy is determined mostly by temperature and the O4-2) to SF₆ ratio. The high degree of anisotropy attainable under conditions of low temperature and high O₂ ratio must be balanced against the problem of micromasking which is also favored by these conditions. Deep silicon trench etching has the potential to have a major impact on micromachining. However, due to the many interactions between numerous variables each etch process must be tailored to the individual application.

A release etch model for etching sacrificial oxides in aqueous HF solutions is presented. This model is an extension of work done by Monk et. al. and Liu et. al The model is inherently one dimensional, but can be used to model the etching of complex three dimensional parts. Solutions and boundary conditions are presented for a number of geometries.

Using porous silicon as a sacrificial layer with a large distance from the structure to the substrate, the porous Si micromachining is a new generation surface micromachining technology. A sketch of the special self-made 3-cavity electrochemical device used for anodisation and a detailed description of the porous film formation parameters were given int his paper. Anodisation is performed with current density 40 mA/cm² for 60 minutes. Formation parameters and amounts of several major impurities of porous-Si layer are studied. The porous-Si layer was removed in 1 percent KOH and then the flow channel with depth of 50 micrometers was formed. A 0.2 micrometers Ni-Cr thin film was deposited and patterned on the Si₃N₄+ poly-Si microbridge as a thermistor. The analysis model was introduced and met quite well with the experiment. The results of the fast response and low power dissipation are reported in this paper.

A new fabrication process for the generation of 3D microstructures is presented. On the base of electrodeposition, microstructures of different 3D shapes could be formed without using molds. This method can be applied for realizing new components for surface micro machining. Furthermore, it can be used as an ad-on process to almost all process technologies and it make use of standard equipment. Also presented is a calculation of linearly increasing structures by the example of wedge shaped plans. The main idea of the new technology is the controlled overplating of patterned plating base sequences.

A bonding method using an anisotropic conductive film (ACF) has been developed for the assembly and interconnection of micromechanical structures. The method provides many advantages such as low temperature, low cost, process simplicity, selective bonding as well as both electrical and mechanical interconnection. These advantages were confirmed by experiment using CP7621. ACF on various materials such as wafers, glasses, thin metal layers, and plastic films. For the experiments, a range of materials were tested including p type, (100) orientation, 100 ohm-cm resistivity, 300 micrometers thickness silicon wafers with/without micromechanical structures, 300 micrometers thick sodalime glass substrates, 1.5 mm thick pyrex glass substrates, and 100 micrometers polyethylene plastic thin film were used to verify the effectiveness of this bonding method. A 2000 angstrom thick sputtered aluminium and chrome layer was also used to confirm the electrical interconnection between conductors. The optimum bonding conditions were achieved at 180 degrees C temperature with 5 kg/cm² pressure applied for 10 seconds. Cleaning was not over critical for the process and the bond strength was strong on silicon and glass substrates. The process was applied to fabricate a silicon micropump that consists of three wafers, results indicating excellent sealing and stability characteristics both needed for this application.

The use of gold based thin film multilayer systems for forming eutectic bonds on wafer scale is investigated and preliminary results will be presented. On polished 4 inch wafers different multilayer systems are developed using thin film techniques and bonded afterwards under reactive atmospheres and different bonding temperatures and forces. Pull tests are performed to extract the bonding strengths.

Wafer bonding is an important fabrication step for some MEMS devices. ALignment of device patterns is vital for a successful bonding. When anisotropic wet etching is employed to fabricate microstructures on single crystal silicon wafers, the same mask may result in different etched patterns on different wafers. If the wafer pair for bonding are not matched well, the position and orientation of device patterns cannot be aligned simultaneously. This article presents a method for position and orientation alignment of the device patterns on wafer pairs. An offset angle indicating mark and a self-aligning bonding fixture are developed to satisfy the alignment requirement. The photomask for wet anisotropic etching contains patterns of indicating marks and wafer cutting targets. The indicating marks provide information of offset angles between device patterns and crystal planes after wet etching. Wafer pairs for bonding are matched with offset angles, depending on the device configuration. Simultaneously align the position and orientation is possible for the matched wafer pairs. Wafers are cut with the guide of cutting targets to ensure they have the same size. The bonding fixture consists of a steel frame and a pair of flat glass plates. The steel frame has a rectangular opening where the wafer pair are sandwiched between the glass plates. The wafer cutting process is the major source of misalignment in this bonding method.

In this paper, we describe a die-forming machine for fabricating 3D microcomponents. Today, most micromachines or devices are fabricated by chemical etching of silicon. From a practical point of view, fabrication using metals as the raw materials should be studied. In this study, die-forming of medical forceps, as an example of a typical medical microtool, was investigated. The forceps currently used are fabricated by a combination of precision machining and hand finishing, thus requiring a considerably long period of time and high costs. We have developed a fabrication technique for metal medical components based on mould-forming. Use of this method results in excellent productivity but there are restriction on the shape of fabricated components. In order to overcome this problem, a micropress system that exclusively fits the fabrication of 3D microcomponents was designed and developed. This is based on the turret punch press, and material processing operations such as rotation of the material and other functions are incorporated. Also, round wire is used as the raw material. The results of practical forming experiments confirmed that the developed micropress reliable for fabricating microcomponents.

Silicon ultra-large-scale integrated circuit (ULSI) technology has experienced an extremely rapid progress for more than 25 years, however, several physical, chemical and technological limitations are foreseen against further scaling beyond the 0.1 micrometers technology level. This paper describes the several key issues towards the possible advancement of nanoscale ULSIs by nanotechnology, especially scanning tunneling microscope (STM). The key factor is the speed or throughput when STM is applied to the fabrication and characterization of ULSIs. Therefore, parallel operation should be indispensable to accomplish the appropriate throughput, which would only be achieved by micromachine STM. Possible application of micromachine STM to characterization and fabrication is described, such as advanced lithography system below 0.1 micrometers technology level.

Micromachine technologies based on IC-compatible micromachining have advantages denoted by three `M's'. Miniaturization is the most popular but Multiplicity, which means the batch fabrication capability of many complicated elements, and Microelectronics to control motions or to add different functions such as the optical function are equally important. This paper deals with the application of micromachine technologies to micro optical devices. A basic concept making the best use of the advantages is proposed. Recent examples of optical microelectromechanical systems are reviewed.

MEMS as a technology base is coming of age, but as in any vital process growing pains occur. Commercializing MEMS is simultaneously viewed as agonizingly slow by many of its promoters and lightingly quick by many companies whose products are being replaced with MEMS based substitutes. This effort ties current efforts in market analysis, technology evaluations, competency based strategy in an effort to understand the pace of MEMS commercialization.

Dry plasma etching can offer many advantages in the fabrication of MEMS because of its anisotropic etching behavior, high etch rate, and its compatibility with traditional IC processing. A patented high density inductively coupled RFIC plasma source with independent source power and substrate bias control has been developed by Alcatel for deep etching of silicon. With the optimization of hardware and process parameters in a Fluorine based chemistry, processes with silicon etch rate up to 6 micrometers/min, etch uniformity better than +/- 5 percent, Si:SiO₂ selectivity of more than 150:1, Si:photoresist selectivity of more than 50:1, etch depths of greater than 250 mm and profile angels of +/- 1 degree have been demonstrated. The silicon etch rate increases with increasing source power and Si:SiO₂ selectivity increases with decreasing substrate bias. Substrate temperature can be maintained between -120 to +20 C during processing. The process parameters can be adjusted to give the desired performance for a particular application. Process results obtained at room temperature and at lower temperatures for different applications will be presented. The results indicate that this technology is a promising candidate for micromachining. The tool can be configured for production applications with vacuum loadlock and automated wafer handling.