The information revolution has been driven by the ever increasing processing power that the microelectronics industry has produced since the invention of the integrated circuit. The 1992 National Technology Roadmap' for semiconductors projects that the industry capabilities will evolve as follows:

Using control hardware and software connected to a personal computer, on-line measurements of the state of a plasma etcher can be used to integrate mathematical models, control algorithms, and equipment communications in a plasma etcher in order to develop a real-time monitoring and control system. Sensors available on the reactor include electrical probes for monitoring the rf voltage and rf current, laser interferometry for measurement of etch rate and end- point detection, and optical emission spectroscopy for relative species concentrations and reactor state measurements. Chamber pressure, rf power, and gas flow rates are manipulated variables in this system. We have developed steady-state models of the plasma etcher using these on-line diagnostics. The focus of this paper is the development of the rf power monitoring system located between the matching network and the plasma chamber. This sensor provides information about the voltage and current of the plasma chamber, the phase difference between them, and the dc bias voltage across the electrodes. Also measured are the capacitor positions of the automatic tuning network and the electrical characteristics before the matching network. For the parallel plate reactor and a CF₄/H₂/Ar plasma used in these experiments, we found that the impedance of the plasma was a nonlinear function of power and pressure. Using simple equivalent circuit models for the plasma discharge and for the transmission cable, we have computed the plasma impedance, actual delivered power, and sheath thickness over a range of operating conditions.

Photocluster control is a key problem in advanced microelectronic manufacturing. As ground rules shrink, sustaining optimum overlay and critical dimension performance requires the frequent updating of tool settings dependent on product, product level, and statistically significant tool/process variation. The system we describe here relies on bi-directional SECS-II interfaces to both exposure and metrology tools for upload/download of tool settings, measurement and logistics data. Exposure tool and process specific models are employed to predict dose, focus and overlay settings for each lot in queue at the exposure tool, based on prior lot or send-ahead wafer metrology data. The alignment and exposure of each lot is then executed under host control, following the automated download of the appropriate settings.

An advanced multivariable off-line process control system, which combines traditional Statistical Process Control (SPC) with feedback control, has been applied to the CVD tungsten process on an Applied Materials Centura reactor. The goal of the model-based controller is to compensate for shifts in the process and maintain the wafer state responses on target. In the present application the controller employs measurements made on test wafers by off-line metrology tools to track the process behavior. This is accomplished by using model- bases SPC, which compares the measurements with predictions obtained from empirically-derived process models. For CVD tungsten, a physically-based modeling approach was employed based on the kinetically-limited H₂ reduction of WF₆. On detecting a statistically significant shift in the process, the controller calculates adjustments to the settings to bring the process responses back on target. To achieve this a few additional test wafers are processed at slightly different settings than the nominal. This local experiment allows the models to be updated to reflect the current process performance. The model updates are expressed as multiplicative or additive changes in the process inputs and a change in the model constant. This approach for model updating not only tracks the present process/equipment state, but it also provides some diagnostic capability regarding the cause of the process shift. The updated models are used by an optimizer to compute new settings to bring the responses back to target. The optimizer is capable of incrementally entering controllables into the strategy, reflecting the degree to which the engineer desires to manipulates each setting. The capability of the controller to compensate for shifts in the CVD tungsten process has been demonstrated. Targets for film bulk resistivity and deposition rate were maintained while satisfying constraints on film stress and WF₆ conversion efficiency.

Scatterometry, the analysis of light scattered by diffraction from periodic structures, is shown to be a versatile process control and metrology technique for use in microelectronics manufacturing. Contemporary inspection technologies, such as scanning force microscopy (SFM) and scanning electron microscopy (SEM), in general cannot be performed in-situ and are slow for real-time process control. Scatterometry, on the other hand, is rapid, nondestructive, inexpensive and might be used on-line. This paper will discuss applications of 2 - (Theta) scatterometry to developed photoresist focus/exposure matrices, often related to the manufacture of microelectronic devices. To test this technique we obtained and measured five identically processed wafers with nominal 0.5 micrometers line/0.5 micrometers space grating patterns. Each wafer is comprised of gratings created in Shipley 89131 negative photoresist and arranged in a matrix of incremental exposure doses and focus settings. The scatterometric CD measurements are consistent in comparison to cross- section and top-down SEM measurements of the same structures. The average deviation of 11 linewidth measurements from top down SEM measurements, over a broad exposure range, is 14.5 nm. In addition, the repeatability (1 - (sigma) ) of the 2 - (Theta) scatterometer is shown to be excellent: 0.5 nm for consecutive measurements and 0.8 nm for day to day measurements.

A procedure is developed which uses SPC concepts to automatically trigger when control action is justified. The conventional concepts of CUSUM and variance are reformulated for computational simplicity. Including initialization, the algorithm is shown to require 18 lines of executable FORTRAN code. The procedure can be used, for instance, to supervise changes in etch reactor conditions based on successive end run analysis.

The semiconductor integrated circuit industry has maintained a steady productivity improvement (cost per function) of two orders of magnitude per decade since its inception. The primal productivity driver has been the continual advances in optical lithography, enabling feature size decreases with concomitant increases in circuit density. The use of multi-level interconnect also drives increases in circuit density. The use of larger diameter wafers exploits economies of scale. Implementation of ultra-clean materials and processing environments, in part made essential by the ever finer feature sizes, leads to high circuit yields. Process control allows high parametric yield, while factory level control is essential for efficient use of the capital. Thus integrated circuit fabrication facilities have evolved from relatively simple low cost operations to extraordinarily large and complex factories costing in excess of $1B. Surprisingly, the cost of processed silicon for typical process flows has remained relatively constant at $3 to $5 persquare centimeter for large volume manufacturers. The catch is, of course, is that the term "large volume" is growing at a pace that makes it more and more difficult for individual companies to finance new facilities by themselves.

One of the most critical issues facing the semiconductor industry is process testing and evaluation. Correcting marginal or faulty processes quickly is essential to maintaining yield and throughput. Simulation, statistical process control, and final circuit electrical tests are the most common methods of approaching the testing and evaluation problem. Statistical process control techniques are used to monitor critical parameters at periodic intervals in the manufacturing process. The variation of the parameters is analyzed to assure the process is within specifications. Although this approach is able to detect and prevent many faults, it is unable to detect other faults that can lead to bad devices. Currently, final electrical and functional tests provide the most comprehensive information in terms of establishing circuit functionality and implementing the necessary process adjustments. However, specific process flaws are generally only detectable by indirect trial and error procedures. These trial and error procedures often require a process engineer to go through a number of iterations between the process and final test data to find the problem.

Multiloop PI control and quadratic dynamic matrix control (QDMC) algorithms are applied for the temperature uniformity control of rapid thermal processing (RTP). Input and output variable transformations are done based on the singular value decomposition (SVD) of the process gain matrix and the (mu) -interaction measure analysis of compensated transfer function matrix. Multiloop PI control with transformation of variables shows improvement in transient responses to set point changes compared with the multiloop PI control without variable transformations and QDMC. Further studies on systematic tuning method for this multiloop PI control is needed to reduce the offsets and to obtain the uniform transient responses.

This paper describes the automatic identification technology which has been installed at Applied Magnetic Corp. MR fab. World class manufacturing requires technology exploitation. This system combines (1) FluoroTrac cassette and operator tracking, (2) CELLworks cell controller software tools, and (3) Auto-Soft Inc. software integration services. The combined system eliminates operator keystrokes and errors during normal processing within a semiconductor fab. The methods and benefits of this system are described.

A versatile methodology is described in which equipment models have been incorporated into a single process diagnostic system for the PECVD of silicon nitride. The diagnosis system has been developed and tested with data collected using an Applied Materials Precision 5000 single wafer reactor. The parametric equipment diagnosis system provides the basis for optimal control of multiple process responses by the classification of potential sources of equipment faults without the assistance of in-situ sensor data. The basis for the diagnosis system is the use of tuned empirical equipment models which have been developed using a physically-based experimental design. Nine individual site-specific models were used to provide an effective method of modeling the spatially-dependent process variations across the wafer with better sensitivity than mean-based models. The diagnostic system has been tested using data that was produced by adjusting the actual equipment controls to artificially simulate a variety of possible subtle equipment drifts and shifts. Statistical algorithms have been implemented which detect equipment drift, shift and variance stability faults using the difference between the predicted process responses to the off-line measured process responses. Fault classification algorithms have been developed to classify the most likely causes for the process drifts and shifts using a pattern recognition system based upon flexible discriminant analysis.

Various applications of an rf sensor to improve manufacturability and its use for equipment maintenance are discussed. It has been found that feedback control of the load power improved wafer to wafer repeatability for both etch rate and uniformity. The sensitivity of the rf measurements to changes in the physical or chemical properties of the discharge, their nonintrusive nature and real time monitoring capabilities suggest their use as a sophisticated process monitor. Process shifts, chamber coating and even misloaded wafers can all be detected. The use of the sensor for feedback control improved process latitude and repeatability. This allows for both tighter process specification and improved manufacturability.

We present a simple optical interferometric technique for measuring temperatures of semiconductor substrates. This technique determines the direction of temperature change from two interferograms, one is an original interferogram and the other is a slightly phase-shifted interferogram due to a small decrease in a wavelength of a pulse- modulated infrared semiconductor laser immediately after the laser was turned on. We measured temperature of a Si wafer during an arbitrary change of heating and cooling.

As semiconductor processing requirements evolve to meet the demands of decreasing geometries, new approached in plasma metrology will be needed to monitor the performances of the equipment and its processes. This performance has traditionally been monitored via Statistical Process Control (SPC) on output parameters such as etch rate and uniformity. These measurements are typically taken on single film wafers which may not be an accurate representation of product. With emerging, nonintrusive, RF sensor technology, equipment and process engineers have access to signals which provide better resolution in determining the health of the equipment. This paper will discuss the relationships between machine settings, real-time RF sensor measurements and the etch rate and uniformity metrics typically used in machine/process qualifications. Run to run control algorithms using the RF sensor measurements will also be presented. Finally, the implications of using RF sensor measurements to provide real-time closed loop control of machine settings will be discussed.

We report on the use of HF chemical sensors to improve the control of both 100:1 and 15:1 HF etch baths used in a bipolar technology manufacturing line. The commercial HF sensor selected for this application is based on the induction of a current from a primary coil to a secondary coil when the coils are immersed in hydrofluoric acid- water solutions. The design of the sensor is such that only polymer surfaces are exposed to the acid. The output of the sensors are used in a Wet Chemical Advisor we have developed to improve the operator control of the etch baths. We present data demonstrating how the Advisor was used to understand the sources of both episodic and drift variations to the specified bath chemistries. The use of the Wet Chemical Advisor platform has eliminated the need for process monitor wafers, and has greatly reduced the time required by operators for making up or maintaining the facilities within specifications. Historical information is stored in the PC for back reference and for quality control documentation.

The performance, cost and reliability of semiconductor processing equipment is greatly affected by the number and type of sensors and actuators used within the equipment. Current semiconductor processing equipment can include over one thousand sensors and actuators of varying accuracy, cost and performance. The integration of theses sensors and actuators is further complicated by varying, non-standard electrical interfaces to them. The role of a sensor bus based control network is to provide an organized approach for interconnecting sensors, actuators and controllers within a piece of equipment. The goal is to provide a more robust and reliable system with minimal development cost by the equipment supplier and with reduced effective cost to the equipment purchaser. This paper will describe several metrics which are used in evaluating a bus architecture and a methodology for designing a network architecture.

The performance, cost and reliability of semiconductor processing equipment is greatly affected by the number and type of sensors and actuators used within the equipment. Current semiconductor processing equipment can include over one thousand sensors and actuators of varying accuracy, cost and performance. The integration of theses sensors and actuators is further complicated by varying, non-standard electrical interfaces to them. The role of a sensor bus is to provide an organized approach for interconnecting sensors, actuators and controllers within a piece of equipment. The goal is to provide a more robust and reliable system with minimal development cost by the equipment supplier and with reduced effective cost to the equipment purchaser. The use of a sensor bus can only be justified if it provides a cost benefit to the integrated circuit manufacturer. Otherwise, the manufacturer will purchase less expensive equipment without a sensor bus which provides equal manufacturing performance. The cost of developing and implementing a sensor bus for semiconductor equipment will affect the tools cost, and any added equipment cost must be justified by an effective reduction in cost of ownership by the manufacturer. This paper focuses on the cost-related trade-off associated with a sensor-buss implementation.

A new material simulation tool is developed which shows physical, thermal, mechanical, electrical and optical properties of thin films as a function of their manufacturing processes. The software uses a unique multidimensional estimation routine developed specifically for properties that vary with several parameters simultaneously. Substantial testing of the estimation software shows reliability of predictions in the range of 2 to 20 percent of the measured property values.

Physical reasons providing sensitivity of a photoemission current to a thicknesses of a thin film and a doped surface layer are considered. Both a difference between optical properties of a substrata and a film coated on it and dependence of photoelectric work function on electrical active admixture concentration are the main of them. Photoelectron emission has been applied to test objects having the thickness in order to 10² angstroms.

The SEMATECH COO model has been used as a design tool to optimize the hardware and application-dependent configurations of the Endura PVD system. The model helped identify and quantify the effects of improved equipment hardware, configurations, and processes. Sensitivity analyses were performed to determine the effect of throughput, chamber and system maintenance down time, reliability, equipment cost, consumables life and cost, and system configuration on cost per wafer (CPW) and wafer starts per week (WSPW). The results indicate that throughput and preventive maintenance down time have the greatest impact on COO. Equipment components were selected or designed and processes and procedures were developed to minimize the CPW and maximize the WSPW per tool. Increases in WSPW of 40 to 60% have been achieved by increasing overall throughput, decreasing PM time, and optimizing PM scheduling. These improvements can yield up to 25% reduction in cost per wafer.

This study is a follow-up to earlier work comparing a 0.6 micron, 5 V silicided gate process to a non-silicided process including variations in 'wet' (delute steam) oxidation anneal conditions evaluated for process simplicity. The present data compares various 'dry' (oxygen only) anneal oxidation conditions with previously demonstrated baseline silicided and non-silicided (poly only) gate processes using combinations of nitrogen anneals and deposited oxides. The dry oxidation anneals prevented excessive gate oxide thickening at the gate edge found previously with wet oxidation. Dry oxidation led to minimal LDD overlap and minimal Idsat changes relative to either the silicided gate baseline or a non-silicided gate using thermal TEOS depositions and nitrogen anneals. Reliability data for the non-silicided dry oxidation anneals is included in this study. The non-silicided gate technology, either with dry oxidation anneals or with a deposited cap oxide gate structure and nitrogen anneals, produced hot-electron and gate oxide breakdown results comparable to the silicided gate baseline with potentially attractive manufacturing advantages.

This paper presents a case study on the implementation of ABC to calculate the cost per wafer and to drive cost reduction efforts for a new IC product line. The cost reduction activities were conducted through the efforts of 11 cross-functional teams which included members of the finance, purchasing, technology development, process engineering, equipment engineering, production control, and facility groups. The activities of these cross functional teams were coordinated by a cost council. It will be shown that these activities have resulted in a 57% reduction in the wafer manufacturing cost of the new product line. Factors contributed to successful implementation of an ABC management system are discussed.

A Self-Directed Work Team (SDWT) was developed to transfer a polyimide process module from the research laboratory to our wafer fab facility for applications in IC specialty devices. The SDWT implemented processes and tools based on the integration of five manufacturing strategies for continuous improvement. These were: Leadership Through Quality (LTQ), Total Productive Maintenance (TMP), Cycle Time Management (CTM), Activity-Based Costing (ABC), and Total Employee Involvement (TEI). Utilizing these management techniques simultaneously, the team achieved six sigma control of all critical parameters, increased Overall Equipment Effectiveness (OEE) from 20% to 90%, reduced cycle time by 95%, cut polyimide manufacturing cost by 70%, and improved its overall team member skill level by 33%.

A study to investigate systematic ways of controlling parametric yield for future production of deep submicron MOSFETs has been performed. It is important to know how and where in the manufacturing process the parametric yield can be controlled most efficiently, because for these devices no manufacturing expertise has yet been accumulated. Our study is based on a comparative sensitivity analysis, which has revealed that yield control techniques employed in micron size devices may not be efficient in deep submicron size devices, making a reorientation for manufacturing control mandatory.

A new, powerful, easy-to-use tool (CHARM-2) for characterizing wafer charging during wafer processing in ion-based and plasma-based IC processing equipment has been developed. The technique uses dedicated, pre-fabricated 6 inch wafers populated with sensors which monitor the driving forces behind charging damage: peak surface-substrate potentials; peak current densities impinging on a wafer; and total integrated UV dose. The CHARM-2 sensors measure these variables in terms of volts, amps/cm², and photon flux. The measurement technique consists of pre-conditioning the CHARM-2 wafers on a tester, placing them in the process chamber, performing the given process, and testing the wafer again. Wafer maps of surface-substrate potentials, fluxes of ions, electrons, and UV photons, are generated in a matter of minutes, providing the user with a 'fingerprint' of the charging characteristics of the process/equipment. The CHARM-2 wafers are also re-usable, and thus more economical than test wafer techniques which use oxide breakdown or transistor stress characteristics. The ability to empirically characterize the J-V characteristics of charging sources using the CHARM-2 monitor wafers also opens the way for prediction of failure rates of oxides subjected to specific processes, if the oxide Qbd distributions are known.

The present paper gives the results of investigations of the process of the laser vacuum projection lithography (LVPL) and design of a laser projection stepper, ensuring practical implementation of the proposed process. The LVPL principles, fields of application are discussed, the LVPL EM-5094 submodule specifications are given and its test results are provided.

The field of Information Intellectual System (IIS) application in technology spreads over solving problems, that cannot be easily formalized and that are connected with the diagnostics and quality control of VLSI. One of the main tasks of IIS in the technology of Microelectronics is the precedent search. Another task no less serious is to mathematically process technological experience using information coded array. The purpose of it is, firstly, to establish interrelation between symptomatic and failures and secondly, to choose an optimal plan of rehabilitation of the technological process and the crystal. The paper describes the basic concepts and principles of software and mathematical software development of computer system of expert diagnostics of technological malfunctions in VLSI manufacturing. The system includes: data base (DB), knowledge base (KB) and subsystems (of precedent search, expert diagnostics and consultations on rehabilitation). DB and KB contain information of defects, their characteristics and failure mechanisms for MOS and bipolar VLSI, taken from scientific publications. The research prototype of this system was realized on IBM Pc using Multiwindow Interface CLIPPER.

The parameters of the deep centers in MOCVD In_0.53Ga_0.47As layers and their dependence on electric field value and device topology on the wafers were studied by DLTS method in In_0.53Ga_0.47As/InP p-i-n photodiodes. The two deep centers with the activation energy E_C -0.299 and 0.389 eV were discovered in depletion region of the p-i-n diodes. The latter defects are nonradiative recombination centers with strong electric field dependence of their activation energies and strong temperature dependence of the capture cross sections.

Aluminum metallization is an important process for planarization and interconnect applications. Wafer temperature during deposition is one of the key parameter determining film properties such as reflectivity and resistivity. Results of experiments carried out in order to characterize the thermal behavior of product wafers during physical vapor deposition, primarily aluminum and wafer degas will be presented. The effects of back and front side depositions, backside gas pressure and plasma power level on deposition temperature are all investigated. The utility of real time in-situ temperature monitoring on every product wafer in all deposition chambers within a cluster tool and the advantages provided in terms of process monitoring are discussed.