Recent advances in the development of wafer steppers at Philips Research Labs. ("sili-con repeaters") are described. A high resolution, high-throughput, completely automatic step and repeat wafer imaging systems for VLSI production has been constructed. Emphasis in this paper is on automatic alignment and high resolution imaging. The automatic alignment system is based on relief gratings, and has an accuracy better than ± 0.1 micron. Alignment time is short and the system is compatible with production requirements, such as automatic wafer feeding. The imaging system is a diffraction limited 5x reduction lens with a numerical aperture of 0.3 and a field of 14 mm diameter, corrected for two wavelengths. Resolu-tion and alignment results on silicon wafers are given.

Technological considerations of direct wafer stepping are examined and the requirements of high volume V.L.S.I. production are identified. An advanced step-and-repeat alignment system is presented which fulfills, to a high degree, the criteria developed. Its high numerical aperture 10:1 reduction lens provides high resolution at high contrast level. A new designed illumination system supplies high exposure intensity at excellent uniformity. An automatic step-by-step alignment, focusing and leveling system compensates for irregular wafer topography and its changes during processing. By the capability to follow images already present on the wafer, it allows cross-matching with other exposure systems used for less critical manufacturing steps. The through-the-lens system of feedback-controlled alignment and true focus recognition eliminates from the machine geometric and optical changes such as those caused by temperature variation. Means for protecting both reticle and wafer against such environmental influences as dust, temperature and vibrations are provided. Equipment design permits high throughput for a large variety of die formats. High productivity is achieved by microprocessor-controlled functions and automatic handling as well as specially developed high speed displacement devices. The instrument presented promises new levels of productivity and working line widths while drawing on current knowledge in resist technology and wafer processing.

Methods of locating and correcting' defects on 10X reticles used for optical step-and-repeat on silicon wafers are presented. The impact of defect type, size, location, and wafer processing on VLSI devices with 1 to 3μm geometries over large clear and dark fields is examined and efforts to minimize defects by improving equipment and materials are discussed. Data gathered from visual and computer analysis are also included.

This paper discusses the sources of intermachine registration errors of wafer step-and-repeat systems. The vernier overlay techniques used by GCA/Burlington to measure intermachine registration of the Mann Type 4800 DSW^TM Wafer Stepper^TM are fully described. Results are given for a number of intermachine comparisons. The use of similar vernier overlay methods to determine the intermachine registration errors between step-and-repeat systems and full field projection mask aligners is also discussed.

Proximity mode printing technology has the potential to achieve adequate defect levels for economical fabrication of VLSI devices. The application of deep-UV to proximity mode printing is evaluated in order to extend achievable resolution to greater wafer-to-mask separations. This technique promises to be a viable supplemental technology to wafer stepper technology.

Unique optical design features were incorporated into the Model 900 Projection Stepper. The f/4 illuminator uses a pulsed 200 w mercury short arc lamp and a glass light pipe to achieve a uniform intensity of .5 w/cm² at the reticle. The 1:1 projection lens is a folded, double-pass design which consists of a concave mirror and a cemented achromat-prism assembly. With a numerical aperture of .30, the lens achieves diffraction-limited performance at both the g and h mercury lines. Reticle to wafer alignment is detected through the lens and corrected automatically at each exposure step.

A tutorial paper clearly defining plasma etch process requirement in the semiconductor industry. Defining pattern fidelity, lateral etch rate, anisotropy, photoresist integrity, etch uniformity and selectivity. Why etch uniformity independent of viscosity, power and pressure is needed to process VLSI circuits, and how etch uniformity is achieved. The bottom line as in all process requirements is a complete process with high yields. A discussion of the trade off requirements facing the process engineer today is also pre-sented. This will include the trade offs of selectivity versus photoresist integrity and pattern fidelity.

Linewidth control and profile contouring of polysilicon by anisotropic plasma etching with Freon 115, (CC₁F₅), and Freon 115/oxygen gas mixtures were investigated utilizing an LFE model 1002-P plana plasma etcher with a laser interferometric endpoint detector. It was found that Freon 115 etches anisotropicly with a reentrant edge profile and good photoresist and Si0₂ etch selectivity. A slight amount of undercutting was observed with overetching and was found to be related to trace amounts of oxygen in the Freon 115 plasma discharge. Freon 115/oxygen mixtures were investigated. It was determined that the polysilicon etch rate and the degree of anisotropy depends strongly on the oxygen concentration. Various combinations of anisotropic/isotropic etch sequences were found to have useful polysilicon edge contouring properties.

Aluminum plus Silicon alloys were etched using a four step process in a planar parallel plate plasma reactor. Chlorine based gas mixtures are used for a rapid etch of the aluminum and a fluorine based gas mixture is used to remove the residual silicon. Wafers patterned with positive and negative photoresists and an etch stop layer of silicon dioxide were used to produce 16K n-channel MOS memory devices. The wafers were processed in a split lot experiment using plasma processing and standard wet chemical etching. Working devices fabricated with these processes were electrically tested. SEM photographs show the resist degradation and the resulting alloy edge profile.

Diazo-type positive photoresists are commonly used for pattern replication by the integrated circuit industry in a thickness range ≈ O.3-3μm. We are using these same resists at thicknesses as great as 40 μm to form electroplating molds for the fabrication of micro-Fresnel zone plates. Difficulties are encountered when films thicker than l5-18μm are used for pattern replication. Most significant of these difficulties are: i) the occurance of bulk microfractures throughout the resist volume, ii) loss of UV sensitivity, and iii) sidewall taper in high aspect ratio structures. These difficulties, with the exception of the sidewall taper, can be overcome with appropriate resist processing schedules.

Macroelectronic photolithography is an extension of conventional photolithographic processes to produce high resolution patterning of thin film integrated circuits over large area substrates. Such patterns are needed in fabricating the addressing circuitry for flat panel liquid crystal displays. The first important step in macroelectronic photolithography involves the development of reliable large area coating processes for photoresist materials. This paper deals with the optimization of the roller coating process for Shipley AZ-1350 J positive photoresist to achieve a resolution of 4 μm line widths and spacings extended and distributed over 10 cm x 10 cm glass substrates. Resist viscosity, doctor bar pressure and roller/substrate interference level were investigated to achieve resist thickness uniformity of ±0.1 μm; this variation in resist thickness would cause a variation of ±0.6 μm in line width. Other problems associated with the photofabrication of thin film macrocircuits are discussed. These include mask preparation, inspection and etching processes. Anticipated solutions to these problems are briefly outlined.

The advent of the step and repeat exposure of integrated circuits demands process optimization in order to effectively utilize the available image resolution and maximize wafer thruput. This can be achieved by characterizing the photoprocess chemistry for step and repeat lithography. To date, exposure optimization has been primarily determined by the considerations of line width and visual appearance of photoresist. This paper suggests a method to characterize various photoresists with respect to UV sensitivity, contrast, and process latitude. The "gamma" function is a convenient method of expressing the sensitivity and contrast of photoresist systems. Gamma is the slope of the minimum versus the maximum exposure time for a given photoresist: y= {log₁₀(D₀/D_i)}^-1 This paper describes the gamma function of several common negative and positive photo-resists obtained with the use of a Mann Type 4800 DSW Wafer Stepper^TM, a new Mann Type 480 Radiometer, and the Nano Spec/AFT thin film measurement tool. Once the chemical "bench mark" of a photoresist is established, the desired attributes of line width and visual characteristics can be achieved within the required chemical constraints.

Production of MOS/LSI circuits with minimum design rule dimensions of 4-6 microns without complete self-aligning features has provided the opportunity to study several aspects of mask to wafer registration. The mask working tools and wafers can be major contributors to misregistration. Detailed measurements and analysis are presented to illuminate the contribution of mask substrate material and wafer physical characteristics (surface, texture, thickness, crystal type, crystal defects) to misregistration. Conclusions are drawn with regard to the practical solution to misregistration in the production environment. Low expansion substrates for masks and thick (20 mil) wafers provide adequate dimensional control for registration.

This study reports the extent of wafer distortion at different stages in a standard NMOS production process and the residual distortion after linear correction. Measured with Manufacturing Electron Beam Exposure System (MEBES), the statistical normal distributions of the distortion at the edge of a 3 inch wafer are: 0.14 ±0.21 μm (2σ) after oxide and nitride, 0.22 ±0.24 μm after field oxidation, 0.43 ±0.30 μm after polysilicon deposition, 0.44 ±0.37 μm after pyroglass and 0.11 ±0.35 μm after aluminum evaporation. These results show the erratic response of the wafers to the production process: e.g., the wafer expansion ranges from 0.13 μm to 0.73 μm after polysilicon deposition. By applying a linear correction to these distortions wafer by wafer, the ±2σ residual distortion is less than ±0.25 μm, which is the accuracy of this measurement technique.

The electron beam exposure system, called EBES, has been used since 1974 to produce 1:1 chromium master masks for integrated circuits. The I.C design rules for VLSI require mask specifications approaching the limit of technology. Data is presented showing the variation of feature size on both macroscopic and microscopic scales. The parameters which impact upon the observed intra-die, inter-die and inter-mask dispersions are discussed. The presentation is slanted toward characteristics important to VLSI, both to serve as a guide to designers and to define those areas which most severely limit achievement of better feature size control.

In contrast to earlier work with nearly opaque photomasks, optical linewidth measurements on wafers encompass materials with a much wider variation in optical parameters and material profiles. Accurate optical edge detection requires corrections for both the relative reflectance and phase at the line edge because of the partial coherence present in optical microscopes. However, measurement systems which cannot provide the appropriate corrections and cannot detect edge location accurately can be calibrated. Since the correction curve is material dependent, calibrated standards are theoretically required for each step in the wafer fabrication process where linewidths are measured. In the proposed approach for thin layers (less than 200 nm), a small number of etched silicon-dioxide-on-silicon wafers can be used for calibration of a large class of wafer materials. Examples of wafer calibration data for filar, image-splitting and image-scanning systems are given. The problems associated with accurate linewidth measurement and calibration for thick layers are also discussed.

This paper evaluates a number of factors relevant to the mask manufacturer or user considering automatic mask inspection equipment. The emphasis is on inspection of ordinary production masks and mask blanks although extension of the design concepts to meet future VLSI needs is also considered. The performance of a commercial automatic mask inspection system which follows these design concepts is reviewed and related to the users objectives.

Existing methods of predicting mask-limited device yield based on average defect density do not account for defect size or superposition of defective dice, since to do so would require a degree of computation which is not feasible with purely manual means. This paper proposes a new algorithm for computing predicted yield, and describes a system which automates the computation of this algorithm, in addition to permitting on-line collection and storage of inspection data from an automatic photomask inspection system. The use of yield predictions obtained thereby for optimizing device yield, or for apportioning the cause of actual degraded yield between the process and the masks, is also discussed.

The specifications for photoresist coated chromium-on-glass substrates used in the manufacture of masks in optical systems will be presented. The specifications were based on data derived from experiments using 2 μm geometries over a field of 9 mm as the image criteria. The impact of the following parameters will be presented: 1) Resist thickness uniformity within a plate and throughout a lot on image size and/or development time, 2) Reflectivity, chromium thickness, exposure and substrate flatness. A comparison of etching techniques and its effect on yield is included, and 3) The use of the IBM 7840 film thickness analyzer as a process control tool and material monitor will also be discussed.

An extensive evaluation has been run on the current state of emulsion plates as applicable to the semiconductor industry. Analyses include direct comparisons of different available manufacturers of silver halide light sensitive systems and their ability to produce a viable product applicable to photo-masking. The parameters tested include control of critical dimensions and defects. The test procedure includes optimized and specified processes for each product and associated limitations in speed, safelight effect, image structure and quality and latent image decay. The parameters of optimized use are also investigated and discussed. Tests include imaging from conlact exposure with both normal and reversal processing.

Traditional measurements of photographic sensitivity have been of little value to microelectronics mask makers. The primary concerns of the mask maker are control of microimagery dimensions and adequate developed density through variation in exposure. The macro characteristic curve or D-log E curve has been considered virtually meaningless in this application. This paper examines two of the micro characteristics of KODAK High Resolution Plates - the microcharacteristic curve relating linewidth to the logarithm of the exposure and the derivative, d(W)/d(log E), relating the rate of change of linewidth with log Exposure. The limited linear relationship between linewidth and macro density is examined. Representative data from a number of production coatings of KODAK High Resolution Plates are illustrated to examine the usefulness of macro density as a predictor of linewidth.

Sensitometric properties were measured for a positive diazo-type photoresist at wavelengths of 365, 405, and 436 nm. It is shown that the exposure data at these three wavelenqths may be combined according to Van Kreveld's additivity law to accurately predict both simultaneous and successive exposures made with combinations of these wavelengths. Exposure modeling using Beer's law and first order photolysis kinetics, when combined with the measured sensitometric properties, supports the validity of Van Kreveld's law for simultaneous and successive exposures. The combined modeling and experimental data also support the existence of a critical inhibitor concentration that defines complete exposure and is the same for all wavelengths as well as for monochromatic simultaneous and successive exposures. Applications of characteristic curves of exposure depth as a function of exposure are outlined.

Following a decade of rapidly shrinking linewidths, semiconductor microlithography stopped short of the predicted one micron level and hovered for most of the 1970's at five microns (or 0.2 mils). By 1979, various developments in equipment, materials and processing allowed the downward trend to be resumed. The gap between five microns and one micron appears to be closing rapidly, with micron and sub-micron lithography again being predicted for high volume manufacturing.