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Proceedings Paper

Plasma Assisted Deposition and Device Technology: Interlevel Dielectric Considerations
Author(s): G. W. Hills; A. S. Harrus; M. J. Thoma
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Paper Abstract

In this paper we discuss several approaches for obtaining satisfactory coverage of plasma enhanced CVD TEOS, PETEOS, over severe topography in submicron and larger CMOS technologies. The problems inherent to PETEOS deposition are presented and several solutions are discussed. Adequate film contours can be obtained by the formation of a simple spacer plus a thick film etchback step. Other approaches discussed include a single deposition and etchback, multiple spacer formation, sloped metal profiles, planarization, and profile modification with physical sputtering.

Paper Details

Date Published: 30 January 1990
PDF: 12 pages
Proc. SPIE 1185, Dry Processing for Submicrometer Lithography, (30 January 1990); doi: 10.1117/12.978050
Show Author Affiliations
G. W. Hills, Applied Materials (United States)
A. S. Harrus, NOVELLUS Systems, Inc. (United States)
M. J. Thoma, AT&T Bell Laboratories (United States)

Published in SPIE Proceedings Vol. 1185:
Dry Processing for Submicrometer Lithography
James A. Bondur; Alan R. Reinberg, Editor(s)

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