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Proceedings Paper

VLSI Architectures For Image Filtering
Author(s): F. Jutand; A. Artieri; G. Concordel; N. Demassieux
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Paper Abstract

This paper presents a study of problems encountered when implementing real time image filters. First, the complexity of the algorithms is studied, according to the peculiarities of applications. Then the problem of the system design and its organisation is presented and differents chip architectures are described for various tradeoffs between the architectural parameters. A new architecture used also for motion estimation is mentioned. In the last chapter the problems of the computation operator design is addressed, with elements on different choices for internal oganization of the computation, pipelining and computation format. This study is based on many applications for which VLSI architectures have already been designed and reported. For some of them chip are currently implemented in our laboratories. Linear filtering has been selected for illustration purpose, but this study is also concerned with many other problems of real time image processing, all exhibiting the common feature of a great importance in the architecture of the global managament of data communication and storage.

Paper Details

Date Published: 25 October 1988
PDF: 8 pages
Proc. SPIE 1001, Visual Communications and Image Processing '88: Third in a Series, (25 October 1988); doi: 10.1117/12.969065
Show Author Affiliations
F. Jutand, Telecom Paris University (France)
A. Artieri, Telecom Paris University (France)
G. Concordel, Telecom Paris University (France)
N. Demassieux, Telecom Paris University (France)

Published in SPIE Proceedings Vol. 1001:
Visual Communications and Image Processing '88: Third in a Series
T. Russell Hsing, Editor(s)

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