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Proceedings Paper

Bit-Serial Architectures For Parallel Arrays
Author(s): P. B. Denyer; S. G. Smith
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Paper Abstract

We review the use of bit-serial circuit techniques for parallel machine architectures. We identify the key concept of functional parallelism and present some examples of its application, including its use in the FIRST silicon compiler. We introduce a new com-parison of LSB-first and MSB-first serial techniques, and find that the latter approach may have distinct advantages for more complex arithmetic functions (like divide and square root), and for a general floating-point element. Finally, we review the serial programmable array processors and find significant future potential as a general computing substrate.

Paper Details

Date Published: 28 July 1986
PDF: 8 pages
Proc. SPIE 0614, Highly Parallel Signal Processing and Architectures, (28 July 1986); doi: 10.1117/12.960499
Show Author Affiliations
P. B. Denyer, University of Edinburgh (U.K.)
S. G. Smith, University of Edinburgh (U.K.)

Published in SPIE Proceedings Vol. 0614:
Highly Parallel Signal Processing and Architectures
Keith Bromley, Editor(s)

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