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Proceedings Paper

What is a Systolic Algorithm?
Author(s): Sailesh K. Rao; T. Kollath
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Paper Abstract

In this paper, we show that every systolic array executes a Regular Iterative Algorithm with a strongly separating hyperplane and conversely, that every such algorithm can be implemented on a systolic array. This characterization provides us with an unified framework for describing the contributions of other authors. It also exposes the relevance of many fundamental concepts that were introduced in the sixties by Hennie, Waite and Karp, Miller and Winograd, to the present day concern of systolic array

Paper Details

Date Published: 28 July 1986
PDF: 15 pages
Proc. SPIE 0614, Highly Parallel Signal Processing and Architectures, (28 July 1986); doi: 10.1117/12.960497
Show Author Affiliations
Sailesh K. Rao, Stanford University (United States)
T. Kollath, Stanford University (United States)

Published in SPIE Proceedings Vol. 0614:
Highly Parallel Signal Processing and Architectures
Keith Bromley, Editor(s)

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