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Proceedings Paper

Track Assembly And Background Suppression Using An Array Processor And Neighborhood Coding
Author(s): Oscar Firschein; Herbert E. Rauch; Walter G. Eppler
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Paper Abstract

A novel method for real time track assembly is presented which identifies new tracks, assigns measurements to existing tracks, and eliminates false tracks. The method utilizes a sequence of two-dimensional frames of binary data from an infrared sensor where binary 1 in a picture element indicates target or noise above threshold and binary 0 is below threshold. Successive sets of two-dimensional frames are combined and then screened using a three-by-three pixel window. The track assembly is based upon neighborhood coding and "track scoring" which uses the binary configuration in the three-by-three window to distinguish between target tracks and noise. The method makes use of successive levels of data processing, and in a cluttered environment (noise in 3% of the pixels) it may be necessary to use three or more levels to eliminate false tracks due to noise. A special coding technique is developed for the Floating Point System AP-120B off-the-shelf array processor to allow processing of 160,000 pixels per second independent of the number of targets. This paper explains the coding scheme and the array processor mechanization.

Paper Details

Date Published: 24 December 1980
PDF: 9 pages
Proc. SPIE 0241, Real-Time Signal Processing III, (24 December 1980); doi: 10.1117/12.959253
Show Author Affiliations
Oscar Firschein, Lockheed Palo Alto Research Laboratory (United States)
Herbert E. Rauch, Lockheed Palo Alto Research Laboratory (United States)
Walter G. Eppler, Lockheed Palo Alto Research Laboratory (United States)

Published in SPIE Proceedings Vol. 0241:
Real-Time Signal Processing III
Tien F. Tao, Editor(s)

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