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Proceedings Paper

A Study of Electron Damage Effects During Low Voltage SEM Metrology
Author(s): Pradeep K. Bhattacharya; Susan K. Jones; Arnold Reisman
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Paper Abstract

Critical dimension metrology, the measurement of the dimensions of features on an integrated circuit, is a vital part of device fabrication technology. As the feature size requirements of ULSI devices continue to decrease below the practical limits of optical metrology, scanning electron microscopy (SEM) inspection and measurement will be utilized on a more routine basis during device fabrication. In semiconductor fabrication applications, metrology techniques are typically used for groundrule verification, in-line inspection of critical layers after photoresist development and after etch, pattern definition and sidewall profile of critical patterns, and determination of etch undercut. With the introduction of submicron design rules, the more established techniques of optical metrology I are inadequate and are rapidly being supplanted by metrology performed on the SEM2. The recent availability of SEM tools which can be operated in a low accelerating voltage mode for inspection of uncleaved device wafers without conductive coatings enables implementation of SEM metrology in a manufacturing environment. Much work is being undertaken to understand the parameters involved in measurement accuracy and precision. However, since radiation exposure to devices occurs during SEM metrology, there is also cause for concern that there could be resultant degradation of the electrical properties of the devices. Degradation has been generally related to generation of fixed positive charge, neutral electron traps, and fixed negative charge in the Si02 due to exposure to ionizing radiation.

Paper Details

Date Published: 19 July 1989
PDF: 8 pages
Proc. SPIE 1087, Integrated Circuit Metrology, Inspection, and Process Control III, (19 July 1989); doi: 10.1117/12.953074
Show Author Affiliations
Pradeep K. Bhattacharya, Microelectronics Center of North Carolina (United States)
Bhabha Atomic Research Centre (India)
Susan K. Jones, Microelectronics Center of North Carolina (United States)
Arnold Reisman, Microelectronics Center of North Carolina (United States)
North Carolina State University (United States)

Published in SPIE Proceedings Vol. 1087:
Integrated Circuit Metrology, Inspection, and Process Control III
Kevin M. Monahan, Editor(s)

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