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Proceedings Paper

Optical Threshold Logic Architectures For Hybrid Binary/Residue Processors
Author(s): R. Arrathoon; T. Klepaczyk
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Paper Abstract

A new hybrid binary/residue arithmetic processor is proposed which significantly reduces the number of components and lines with respect to ordinary residue processors. Programmable optical threshold logic elements are combined with the hybrid structure to produce an optical architecture which offers substantial advantages over all-electronic approaches.

Paper Details

Date Published: 29 January 1985
PDF: 7 pages
Proc. SPIE 0517, Integrated Optical Circuit Engineering I, (29 January 1985); doi: 10.1117/12.945142
Show Author Affiliations
R. Arrathoon, Wayne State University (United States)
T. Klepaczyk, Wayne State University (United States)

Published in SPIE Proceedings Vol. 0517:
Integrated Optical Circuit Engineering I
Daniel B. Ostrowsky; Sriram Sriram, Editor(s)

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