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Proceedings Paper

Mapping Sequential Processing Algorithms Onto Parallel Distributed Processing Architectures
Author(s): Rodney Clark; Charles Hester; Perry Lindberg
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Paper Abstract

Teledyne Brown Engineering has developed techniques for mapping sequential algorithms onto a neural model of a parallel distributed processor. Any sequential algorithm (including NP algorithms) can be mapped onto a neural network. This paper discusses some practical considerations for implementation of sequential to parallel mappings (SPM). It is feasible to generalize these techniques and implement a neural compiler for sequential algorithms. Neural networks (the interconnection matrix) generated by the neural compiler will be implemented in a fixed, holographic, optical computer.

Paper Details

Date Published: 20 April 1988
PDF: 9 pages
Proc. SPIE 0880, High Speed Computing, (20 April 1988); doi: 10.1117/12.944029
Show Author Affiliations
Rodney Clark, Teledyne Brown Engineering (United States)
Charles Hester, Teledyne Brown Engineering (United States)
Perry Lindberg, Teledyne Brown Engineering (United States)

Published in SPIE Proceedings Vol. 0880:
High Speed Computing
David P. Casasent, Editor(s)

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