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Proceedings Paper

Optimization Of Optimetrix Wafer Steppers In Very Large Scaled Integrated Circuit (VLSI) Process
Author(s): Tonny Soesanto; Ken Harrison
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Paper Abstract

Step and repeat projection aligners have evolved as the major lithographic system in the development of VLSI technology. High numerical aperture lenses get the resolution down to 1.0um or smaller, while the fully automatic field-by-field alignments provide the potential for achieving overlay accuracy of a small fraction of a micron. This paper will discuss the various options available to the users of Optimetrix 8010 (10 to 1 system) wafer steppers to get the best overlay registration. The effect of autoalignment iterations and autoalignment limits will be discussed against throughput and overlay registration on various substrates. A new alignment mark was used to achieve better alignment accuracy and automatic dia camera feature on the system was also evaluated. As a device becomes more complex and occupies a larger area, intradie pattern distortions (hence system-system) may significantly contribute to overlay error. This intradie pattern distortion may be caused by temperature fluctuations and distortion inherent in the design of the lenses. Both of these factors were evaluated and the intradie overlay errors are compared to interdie overlay errors. These interdie and intradie overlay errors determine the total stepper error which must be incorporated in the design rules.

Paper Details

Date Published: 29 June 1984
PDF: 12 pages
Proc. SPIE 0470, Optical Microlithography III: Technology for the Next Decade, (29 June 1984); doi: 10.1117/12.941896
Show Author Affiliations
Tonny Soesanto, National Semiconductor Corporation (United States)
Ken Harrison, National Semiconductor Corporation (United States)

Published in SPIE Proceedings Vol. 0470:
Optical Microlithography III: Technology for the Next Decade
Harry L. Stover, Editor(s)

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