Yield data presented both for meander tracks and for contact chains show that the latter are considerably more vulnerable to defects involved in wafer processing, especially at the smaller feature sizes. A yield model, which is extended to cater for this difference, is applied to aspects of the scaling of integrated circuits.

Date Published: 29 June 1984
PDF: 7 pages
Proc. SPIE 0470, Optical Microlithography III: Technology for the Next Decade, (29 June 1984); doi: 10.1117/12.941886

Published in SPIE Proceedings Vol. 0470:
Optical Microlithography III: Technology for the Next Decade
Harry L. Stover, Editor(s)