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Proceedings Paper

Off-Line Quality Control In Integrated Circuit Fabrication Using Experimental Design
Author(s): M. S. Phadke; R. N. Kackar; D. V. Speeney; M. J. Grieco
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Paper Abstract

Off-line quality control is a systematic method of optimizing production processes and product designs. It is widely used in Japan to produce high quality products at low cost. The method was introduced to us by Professor Genichi Taguchi who is a Deming-award winner and a former Director of the Japanese Academy of Quality. In this paper we will i) describe the off-line quality control method, and ii) document our efforts to optimize the process for forming contact windows in 3.5 Aim CMOS circuits fabricated in the Murray Hill Integrated Circuit Design Capability Laboratory. In the fabrication of integrated circuits it is critically important to produce contact windows of size very near the target dimension. Windows which are too small or too large lead to loss of yield. The off-line quality control method has improved both the process quality and productivity. The variance of the window size has been reduced by a factor of four. Also, processing time for window photolithography has been substantially reduced. The key steps of off-line quality control are: i) Identify important manipulatable process factors and their potential working levels. ii) Perform fractional factorial experiments on the process using orthogonal array designs. iii) Analyze the resulting data to determine the optimum operating levels of the factors. Both the process mean and the process variance are considered in this analysis. iv) Conduct an additional experiment to verify that the new factor levels indeed give an improvement.

Paper Details

Date Published: 17 April 1987
PDF: 29 pages
Proc. SPIE 0775, Integrated Circuit Metrology, Inspection, & Process Control, (17 April 1987); doi: 10.1117/12.940434
Show Author Affiliations
M. S. Phadke, AT&T (United States)
R. N. Kackar, AT&T (United States)
D. V. Speeney, AT&T (United States)
M. J. Grieco, AT&T (United States)

Published in SPIE Proceedings Vol. 0775:
Integrated Circuit Metrology, Inspection, & Process Control
Kevin M. Monahan, Editor(s)

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