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Proceedings Paper

3-D Scene Generation On A Shared Memory Parallel Processor
Author(s): R. F. Kelly
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Paper Abstract

Realistic 3-D scene generation is now a possibility for many applications. One barrier to increased use of this technique is the large amount of computer processing time needed to render a scene. With the advent of parallel processors that barrier may be overcome if efficient parallel scene generation algorithms can be developed. In general, this has not been true because of restrictions imposed by non-shared memory and limited processor interconnect architectures. In addition, vector processors do not efficiently support the adaptive nature of many of the algorithms. A new parallel computer, the NYU Ultracomputer, has been developed which features a shared memory with a combining network. The com-bining network permits simultaneous reads and writes to the same memory location using a new instruction the Fetch and_Op. These memory references are resolved in the memory access network and result in particularly efficient shared data structures. Basic elements of this architecture are also being used in the design of the gigaflop range RP3 at IBM. Some algorithms typical of image synthesis are explored in the paper and a class of equivalent queue based algorithms are developed. These algorithms are particularly well suited to the Ultra-computer class processor and hold the promise for many new applications of realistic scene generation.

Paper Details

Date Published: 16 June 1987
PDF: 9 pages
Proc. SPIE 0761, True Three-Dimensional Imaging Techniques & Display Technologies, (16 June 1987); doi: 10.1117/12.940138
Show Author Affiliations
R. F. Kelly, Grumman Data Systems (United States)

Published in SPIE Proceedings Vol. 0761:
True Three-Dimensional Imaging Techniques & Display Technologies
David F. McAllister; Woodrow E. Robbins, Editor(s)

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