Share Email Print

Proceedings Paper

Development Of An Optical Parallel Logic Device And A Half-Adder Circuit For Digital Optical Processing
Author(s): Ravindra A. Athale; Sing H. Lee
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

An Optical Parallel Logic (OPAL) device which performs Boolean algebraic operations on binary images has been developed. This device consists of a photoconductor and an electro-optic light modulating material appropriately arranged to bring about an interaction between the input signals. Two such OPAL devices have been interconnected to form a half-adder circuit which is one of the essential components of the CPU in a futuristic digital optical processor. Operation of an 8 x 8 OPAL device containing CdS (photoconductor) and twisted nematic liquid crystal (electrooptic light modulating material) was demonstrated. A contrast ratio of 20:1 was obtained. A circuit composed of two such devices was shown to perform addition of two 8 x 8 binary images generating SUM and CARRY images.

Paper Details

Date Published: 8 December 1978
PDF: 8 pages
Proc. SPIE 0154, Real-Time Signal Processing I, (8 December 1978); doi: 10.1117/12.938251
Show Author Affiliations
Ravindra A. Athale, University of California (United States)
Sing H. Lee, University of California, (United States)

Published in SPIE Proceedings Vol. 0154:
Real-Time Signal Processing I
T. F. Tao, Editor(s)

© SPIE. Terms of Use
Back to Top