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Proceedings Paper

Analysis Of Low-Level Computer Vision Algorithms For Implementation On A Very Large Scale Integrated (VLSI) Processor Array
Author(s): Michael R. Lowry; Allan Miller
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Paper Abstract

In a recent paper [Lowry 81], we described an architecture for a computer vision rectangular processor array that is suitable for VLSI implementation. In this paper we will review that architecture and discuss extensions to it and present results of an array simulator applied to vision algorithms. We will also present an algorithm for re-routing an array with bad processors into a working subset of the array, making it feasible to implement a large array on one wafer-sized chip.

Paper Details

Date Published: 23 May 1983
PDF: 8 pages
Proc. SPIE 0360, Robotics and Industrial Inspection, (23 May 1983); doi: 10.1117/12.934096
Show Author Affiliations
Michael R. Lowry, Stanford University (United States)
Allan Miller, Stanford University (United States)

Published in SPIE Proceedings Vol. 0360:
Robotics and Industrial Inspection
David P. Casasent, Editor(s)

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