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Proceedings Paper

Concurrent Very Large Scale Integration (VLSI) Structure For Digital Signal Processing
Author(s): Ralph K. Cavin III; Noel R. Strader II
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Paper Abstract

A highly concurrent architecture for a high-speed digital signal processing engine is described. Initially, a repetitive structure of identical processing elements which realizes a one-dimensional state variable filter is defined. This structure uses primarily local communication with topologically simple interconnections among the processing elements. It is then shown that these relatively simple processing engines can be combined, again in a regular manner, to solve two-dimensional filter problems. Application of this basic filter structure to provide high-speed solutions for other standard signal processing transforms such as the Discrete Fourier Transform , the Chirp Z Transform, and the Running Discrete Discrete Transform is also presented.

Paper Details

Date Published: 28 December 1982
PDF: 8 pages
Proc. SPIE 0341, Real-Time Signal Processing V, (28 December 1982);
Show Author Affiliations
Ralph K. Cavin III, Texas A&M University (United States)
Noel R. Strader II, Texas A&M University (United States)

Published in SPIE Proceedings Vol. 0341:
Real-Time Signal Processing V
Joel Trimble, Editor(s)

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