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Proceedings Paper

Development Of A Three-Dimensional Circuit Integration Technology And Computer Architecture
Author(s): R. D. Etchells; J. Grinberg; G. R. Nudd
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Paper Abstract

This paper is the first of a series 1,2,3 describing a range of efforts at Hughes Research Laboratories, which are collectively referred to as "Three-Dimensional Microelectronics." The technology being developed is a combination of a unique circuit fabrication/packaging technology and a novel processing architecture. The packaging technology greatly reduces the parasitic impedances associated with signal-routing in complex VLSI structures, while simultaneously allowing circuit densities orders of magnitude higher than the current state-of-the-art. When combined with the 3-D processor architecture, the resulting machine exhibits a one- to two-order of magnitude simultaneous improvement over current state-of-the-art machines in the three areas of processing speed, power consumption, and physical volume. The 3-D architecture is essentially that commonly referred to as a "cellular array", with the ultimate implementation having as many as 512 x 512 processors working in parallel. The three-dimensional nature of the assembled machine arises from the fact that the chips containing the active circuitry of the processor are stacked on top of each other. In this structure, electrical signals are passed vertically through the chips via thermomigrated aluminum feedthroughs. Signals are passed between adjacent chips by micro-interconnects. This discussion presents a broad view of the total effort, as well as a more detailed treatment of the fabrication and packaging technologies themselves. The results of performance simulations of the completed 3-D processor executing a variety of algorithms are also presented. Of particular pertinence to the interests of the focal-plane array community is the simulation of the UNICORNS nonuniformity correction algorithms as executed by the 3-D architecture.

Paper Details

Date Published: 29 December 1981
PDF: 9 pages
Proc. SPIE 0282, Technical Issues in Focal Plane Development, (29 December 1981); doi: 10.1117/12.931973
Show Author Affiliations
R. D. Etchells, Hughes Research Laboratories (United States)
J. Grinberg, Hughes Research Laboratories (United States)
G. R. Nudd, Hughes Research Laboratories (United States)

Published in SPIE Proceedings Vol. 0282:
Technical Issues in Focal Plane Development
William S. Chan; Esther Krikorian, Editor(s)

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