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Proceedings Paper

Multilevel Resist For Photolithography Utilizing An Absorbing Dye: Simulation And Experiment
Author(s): M. M. O'Toole; E. D. Liu; M. S. Chang
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Paper Abstract

Linewidth control using a tri-level resist system on wafers with topology is investigated. An absorbing dye is incorporated in the bottom layer to improve the usable resolution. Resist patterns of 1 μm and 0.75 μm over underlying geometries are demonstrated using a projection aligner. The advantages of a multilevel system are investigated using an exposure and development simulation program for optical lithography. The relative contributions of planarization and reflection suppression are discussed.

Paper Details

Date Published: 28 July 1981
PDF: 8 pages
Proc. SPIE 0275, Semiconductor Microlithography VI, (28 July 1981); doi: 10.1117/12.931883
Show Author Affiliations
M. M. O'Toole, Hewlett-Packard Laboratories (United States)
E. D. Liu, Hewlett-Packard Laboratories (United States)
M. S. Chang, Hewlett-Packard Laboratories (United States)

Published in SPIE Proceedings Vol. 0275:
Semiconductor Microlithography VI
James W. Dey, Editor(s)

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