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Proceedings Paper

Hardware implementation of Corner2 lossless compression algorithm for maskless lithography systems
Author(s): Jeehong Yang; Xiaohui Li; Serap A. Savari
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Paper Abstract

The data delivery throughput of maskless lithography systems can be improved by applying a lossless image compression algorithm to the layout images and using a lithography writer that contains a decoding circuit packed in single silicon to decode the compressed image on-the-fly. In our past research we have introduced Corner2, a layout image compression algorithm which achieved significantly better performance in all aspects (compression ratio, encoding/decoding speed, decoder memory requirement) than Block C4. In this paper, we present the synthesis results of the Corner2 decoder for FPGA implementation.

Paper Details

Date Published: 21 March 2012
PDF: 6 pages
Proc. SPIE 8323, Alternative Lithographic Technologies IV, 83232O (21 March 2012); doi: 10.1117/12.917581
Show Author Affiliations
Jeehong Yang, Univ. of Michigan (United States)
Xiaohui Li, Texas A&M Univ. (United States)
Serap A. Savari, Texas A&M Univ. (United States)

Published in SPIE Proceedings Vol. 8323:
Alternative Lithographic Technologies IV
William M. Tong, Editor(s)

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