
Proceedings Paper
A 55 μW programmable gain amplifier with constant bandwidth for a direct conversion receiverFormat | Member Price | Non-Member Price |
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Paper Abstract
A fully differential programmable gain amplifier (PGA) with constant transfer characteristic and very low power
consumption is proposed and implemented in a 130 nm CMOS technology. The PGA features a gain range of
4 dB to 55 dB with a step size of 6 dB and a constant bandwidth of 10-550 kHz. It employs two stages of
variable amplification with an intermediate 2nd order low-pass channel filter.
The first stage is a capacitive feedback OTA using current-reuse achieving a low input noise density of
16.7 nV/√Hz. This stage sets the overall high-pass cutoff frequency to approximately 10 kHz. For all gain
settings the high-pass cutoff frequency variation is within ±5%.
The low-pass channel filter is merged with a second amplifying stage forming a Sallen-Key structure. In order
to maintain a constant transfer characteristic versus gain, the Sallen-Key feedback is taken from different taps of
the load resistance. Using this new approach, the low-pass cutoff frequency stays between 440 kHz and 590 kHz
for all gain settings (±14%). Finally, an offset cancelation loop reduces the output offset of the PGA to less than
5 mV (3σ).
The PGA occupies an area of approximately 0.06 mm2 and achieves a post-layout power consumption of
55 μW from a 1V-supply. For the maximum gain setting the integrated input referred noise is 14.4 μVRMS while
the total harmonic distortion is 0.7 % for a differential output amplitude of 0.5 V.
Paper Details
Date Published: 3 May 2011
PDF: 7 pages
Proc. SPIE 8067, VLSI Circuits and Systems V, 80670B (3 May 2011); doi: 10.1117/12.886994
Published in SPIE Proceedings Vol. 8067:
VLSI Circuits and Systems V
Teresa Riesgo; Eduardo de la Torre-Arnanz, Editor(s)
PDF: 7 pages
Proc. SPIE 8067, VLSI Circuits and Systems V, 80670B (3 May 2011); doi: 10.1117/12.886994
Show Author Affiliations
Jens Masuch, Institute of Microelectronics of Seville (Spain)
Manuel Delgado-Restituto, Institute of Microelectronics of Seville (Spain)
Published in SPIE Proceedings Vol. 8067:
VLSI Circuits and Systems V
Teresa Riesgo; Eduardo de la Torre-Arnanz, Editor(s)
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