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Proceedings Paper

DPT restricted design rules for advanced logic applications
Author(s): Yunfei Deng; Yuangsheng Ma; Hidekazu Yoshida; Jongwook Kye; Harry J. Levinson; Jason Sweis; Tamer H. Coskun; Vishnu Kamat
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Paper Abstract

Double patterning technology (DPT) provides the extension to immersion lithography before EUV lithography or other alternative lithography technologies are ready for manufacturing. Besides the additional cost due to DPT processes over traditional single patterning process, DPT design restrictions are of concerns for potential additional design costs. This paper analyzes design restrictions introduced by DPT in the form of DPT restricted design rules, which are the interface between design and technology. Both double patterning approaches, Litho-Etch-Litho-Etch (LELE) and Self-Aligned Double Patterning with spacer lithography (SADP), are studied. DPT design rules are summarized based on drawn design layers instead of decomposed layers. It is shown that designs can be made DPT compliant designs if DPT design rules are enforced and DPT coloring check finds no odd cycles. This paper also analyzes DPT design rules in the design rule optimization flow with examples. It is essential to consider DPT design rules in the integrated optimization flow. Only joint optimization in design rules between design, decomposition and process constraints can achieve the best scaled designs for manufacturing. This paper also discusses DPT enablement in the design flow where DPT aware design tools are needed so that final designs can meet all DPT restricted design rules.

Paper Details

Date Published: 5 April 2011
PDF: 11 pages
Proc. SPIE 7973, Optical Microlithography XXIV, 79730H (5 April 2011); doi: 10.1117/12.879793
Show Author Affiliations
Yunfei Deng, GLOBALFOUNDRIES Inc. (United States)
Yuangsheng Ma, GLOBALFOUNDRIES Inc. (United States)
Hidekazu Yoshida, GLOBALFOUNDRIES Inc. (United States)
Jongwook Kye, GLOBALFOUNDRIES Inc. (United States)
Harry J. Levinson, GLOBALFOUNDRIES Inc. (United States)
Jason Sweis, Cadence Design Systems, Inc (United States)
Tamer H. Coskun, Cadence Design Systems, Inc (United States)
Vishnu Kamat, Cadence Design Systems, Inc (United States)

Published in SPIE Proceedings Vol. 7973:
Optical Microlithography XXIV
Mircea V. Dusa, Editor(s)

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