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Proceedings Paper

CD uniformity improvement of through-pitch contact-hole patterning for advanced logic devices
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Paper Abstract

This paper investigates the CD correction methods to obtain better across-wafer CD uniformity (CDU) after etching for logic devices which have various types of patterns. CD optimization methods are evaluated for contact holes with a diameter of 46 nm after etching. CD optimization methods with PEB temperature and exposure-dose mapping on a wafer at a lithography step are examined in detail. Simulation study using a full physical resist model is done to analyze the detailed effects of each optimization method. The results of the simulation show that better optical and chemical image gives better CD controllability through pitches for etching CD correction. Simulation results also show that the pitch with a middle CD sensitivity makes the CD correction sensitivity difference minimum through pitches. From the simulation, the sensitivity behaviors are found to be relatively similar for both of PEB temperature and dose control. Rather than sensitivity behavior differences between the two CD control methods, the intra-wafer spatial resolution of the CD control methods is found to be an important factor for the strategy of CD optimization. Finally, by contact-layer CD optimization, across-wafer CDUs are improved by more than 50%. The variation in the electric resistance of contacts is also improved by more than 20%. As a result, the proposed method is found to be effective for CDU improvement of through-pitch contact-hole patterning for advanced logic device.

Paper Details

Date Published: 20 April 2011
PDF: 11 pages
Proc. SPIE 7971, Metrology, Inspection, and Process Control for Microlithography XXV, 79711P (20 April 2011); doi: 10.1117/12.879589
Show Author Affiliations
Takaaki Kuribayashi, Renesas Electronics Corp. (Japan)
Yoshinori Matsui, Renesas Electronics Corp. (Japan)
Kazuyuki Yoshimochi, Renesas Electronics Corp. (Japan)
Seiji Nagahara, Renesas Electronics Corp. (Japan)
Takayuki Uchiyama, Renesas Electronics Corp. (Japan)

Published in SPIE Proceedings Vol. 7971:
Metrology, Inspection, and Process Control for Microlithography XXV
Christopher J. Raymond, Editor(s)

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