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Proceedings Paper

Fundamental performance differences between CMOS and CCD imagers, part IV
Author(s): James Janesick; Jeff Pinter; Robert Potter; Tom Elliott; James Andrews; John Tower; Mark Grygon; Dave Keller
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Paper Abstract

This paper is a continuation of past papers written on fundamental performance differences of scientific CMOS and CCD imagers. New characterization results presented below include: 1). a new 1536 × 1536 × 8μm 5TPPD pixel CMOS imager, 2). buried channel MOSFETs for random telegraph noise (RTN) and threshold reduction, 3) sub-electron noise pixels, 4) 'MIM pixel' for pixel sensitivity (V/e-) control, 5) '5TPPD RING pixel' for large pixel, high-speed charge transfer applications, 6) pixel-to-pixel blooming control, 7) buried channel photo gate pixels and CMOSCCDs, 8) substrate bias for deep depletion CMOS imagers, 9) CMOS dark spikes and dark current issues and 10) high energy radiation damage test data. Discussions are also given to a 1024 × 1024 × 16 um 5TPPD pixel imager currently in fabrication and new stitched CMOS imagers that are in the design phase including 4k × 4k × 10 μm and 10k × 10k × 10 um imager formats.

Paper Details

Date Published: 30 July 2010
PDF: 30 pages
Proc. SPIE 7742, High Energy, Optical, and Infrared Detectors for Astronomy IV, 77420B (30 July 2010); doi: 10.1117/12.862491
Show Author Affiliations
James Janesick, Sarnoff Corp. (United States)
Jeff Pinter, Sarnoff Corp. (United States)
Robert Potter, Sarnoff Corp. (United States)
Tom Elliott, Jet Propulsion Lab. (United States)
James Andrews, Sarnoff Corp. (United States)
John Tower, Sarnoff Corp. (United States)
Mark Grygon, Sarnoff Corp. (United States)
Dave Keller, Sarnoff Corp. (United States)

Published in SPIE Proceedings Vol. 7742:
High Energy, Optical, and Infrared Detectors for Astronomy IV
Andrew D. Holland; David A. Dorn, Editor(s)

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