We describe a CMOS image sensor with column-parallel delta-sigma (ΔΣ) analog-to-digital converter (ADC). The design employs three transistor pixels (3T¹) where the unique configuration of the ΔΣ ADC reduces the noise contribution of the readout transistor. A 128 x 128 pixel image sensor prototype is fabricated in 0.35μm TSMC technology. The reset noise and the offset fixed pattern noise (FPN) are removed in the digital domain. The measured readout noise is 37.8μV for an exposure time of 33ms. The low readout noise allows an improved low light response in comparison to other state-of-art designs. The design is suitable for applications demanding excellent low-light response such as astronomical imaging. The sensor has a measured intra-scene dynamic range (DR) of 91 dB, and a peak signal-to-noise ratio (SNR) of 54 dB.

Date Published: 16 July 2010
PDF: 8 pages
Proc. SPIE 7742, High Energy, Optical, and Infrared Detectors for Astronomy IV, 774217 (16 July 2010); doi: 10.1117/12.857391

Published in SPIE Proceedings Vol. 7742:
High Energy, Optical, and Infrared Detectors for Astronomy IV
Andrew D. Holland; David A. Dorn, Editor(s)