The conventional streak camera (CSC) is an optoelectronic instrument which captures the spatial distribution versus time of a ultra high-speed luminous phenomena with a picosecond temporal resolution and a typical spatial resolution of 60 μm. This paper presents two Integrated Streak Camera (ISC) architectures called MISC (M for Matrix) and VISC (V for Vector) which replicate the functionality of a streak camera on a single CMOS chip. The MISC structure consists of a pixel array, where the column depth together with the sampling rate determine the observation window. For proper operation, the image of the slit has to be spread uniformly over the rows of the imager. The VISC architecture is based on a single column of photosensors, where each element is coupled to a front-end and a multi-sampling and storage unit. The observation window is determined by the sampling rate and the depth of the memory frame. The measurement of a 6 ns FWHM 532 nm light pulse laser is reported for both ISCs. For the two architectures, the spatial resolution is linked to the size and the number of the photodetectors.

Date Published: 17 May 2010
PDF: 13 pages
Proc. SPIE 7719, Silicon Photonics and Photonic Integrated Circuits II, 77190V (17 May 2010); doi: 10.1117/12.853911

Published in SPIE Proceedings Vol. 7719:
Silicon Photonics and Photonic Integrated Circuits II
Giancarlo Cesare Righini, Editor(s)