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Proceedings Paper

Fast methods for computing scene raw signals in millimeter-wave sensor simulations
Author(s): Richard F. Olson; Terry M. Reynolds; H. Dewayne Satterfield
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Paper Abstract

Modern millimeter wave (mmW) radar sensor systems employ wideband transmit waveforms and efficient receiver signal processing methods for resolving accurate measurements of targets embedded in complex backgrounds. Fast Fourier Transform processing of pulse return signal samples is used to resolve range and Doppler locations, and amplitudes of scattered RF energy. Angle glint from RF scattering centers can be measured by performing monopulse arithmetic on signals resolved in both delta and sum antenna channels. Environment simulations for these sensors - including all-digital and hardware-in-the-loop (HWIL) scene generators - require fast, efficient methods for computing radar receiver input signals to support accurate simulations with acceptable execution time and computer cost. Although all-digital and HWIL simulations differ in their representations of the radar sensor (which is itself a simulation in the all-digital case), the signal computations for mmW scene modeling are closely related for both types. Engineers at the U.S. Army Aviation and Missile Research, Development and Engineering Center (AMRDEC) have developed various fast methods for computing mmW scene raw signals to support both HWIL scene projection and all-digital receiver model input signal synthesis. These methods range from high level methods of decomposing radar scenes for accurate application of spatially-dependent nonlinear scatterer phase history, to low-level methods of efficiently computing individual scatterer complex signals and single precision transcendental functions. The efficiencies of these computations are intimately tied to math and memory resources provided by computer architectures. The paper concludes with a summary of radar scene computing performance on available computer architectures, and an estimate of future growth potential for this computational performance.

Paper Details

Date Published: 23 April 2010
PDF: 10 pages
Proc. SPIE 7663, Technologies for Synthetic Environments: Hardware-in-the-Loop Testing XV, 76630L (23 April 2010); doi: 10.1117/12.853466
Show Author Affiliations
Richard F. Olson, U.S. Army AMRDEC (United States)
Terry M. Reynolds, Simulation Technologies, Inc. (United States)
H. Dewayne Satterfield, Simulation Technologies, Inc. (United States)

Published in SPIE Proceedings Vol. 7663:
Technologies for Synthetic Environments: Hardware-in-the-Loop Testing XV
James A. Buford Jr.; Robert Lee Murrer Jr., Editor(s)

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