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Proceedings Paper

The GridMapper challenge: how to integrate into manufacturing for reduced overlay error
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Paper Abstract

More sophisticated corrections of overlay error are required because of the challenge caused by technology scaling faster than fundamental tool improvements. Starting at the 45 nm node, the gap between the matchedmachine- overlay error (MMO) and technology requirement has decreased to the point where additional overlay correction methods are needed. This paper focuses on the steps we have taken to enable GridMapperTM, which is offered by ASML, as a method to reduce overlay error. The paper reviews the basic challenges of overlay error and previous standard correction practices. It then describes implementation of GridMapper into IBM's 300 mm fabrication facility. This paper also describes the challenges we faced and the improvements in overlay control observed with the use of this technique. Specifically, this paper will illustrate several improvements: 1. Minimization of non-linear grid signature differences between tools 2. Optimization of overlay corrections across all fields 3. Decreased grid errors, even on levels not using GridMapper 4. Maintenance of the grid for the lifetime of a product 5. Effectiveness in manufacturing - cycle time, automated corrections for tool grid signature changes and overlay performance similar to dedicated chuck performance

Paper Details

Date Published: 3 March 2010
PDF: 6 pages
Proc. SPIE 7640, Optical Microlithography XXIII, 764015 (3 March 2010); doi: 10.1117/12.849225
Show Author Affiliations
Allen Gabor, IBM Systems and Technology Group (United States)
Bernhard Liegl, IBM Systems and Technology Group (United States)
Michael Pike, IBM Systems and Technology Group (United States)
Emily Hwang, IBM Systems and Technology Group (United States)
Timothy Wiltshire, IBM Systems and Technology Group (United States)

Published in SPIE Proceedings Vol. 7640:
Optical Microlithography XXIII
Mircea V. Dusa; Will Conley, Editor(s)

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