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Proceedings Paper

Compact low-cost high-sensitivity CMOS radar-on-chip integration for security applications
Author(s): Changzhi Li; Jenshan Lin
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Paper Abstract

Based on the measurement results of a 5 GHz CMOS radar microchip, it is shown that low power CMOS radar-on-chip integration can have high detection sensitivity despite the large flicker noise and phase noise contributions around the signal of interest. Key technologies to further increase the detection sensitivity will be discussed, including software configured DC offset calibration, noise suppression using tunable baseband bandwidth limiter, and special receiver architecture for flicker noise reduction. The applications of low-cost high-sensitivity on-chip radar will be focused on surveillance and reconnaissance, sensing through-wall radar, ground penetration radar, border monitoring, and moving target detection.

Paper Details

Date Published: 26 April 2010
PDF: 10 pages
Proc. SPIE 7669, Radar Sensor Technology XIV, 76690N (26 April 2010); doi: 10.1117/12.848519
Show Author Affiliations
Changzhi Li, Texas Tech Univ. (United States)
Jenshan Lin, Univ. of Florida (United States)


Published in SPIE Proceedings Vol. 7669:
Radar Sensor Technology XIV
Kenneth I. Ranney; Armin W. Doerry, Editor(s)

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