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Proceedings Paper • Open Access

Taming the final frontier of optical lithography: design for sub-resolution patterning
Author(s): Lars W. Liebmann; Jongwook Kye; Byung-Sung Kim; Lei Yuan; Jean-Pierre Geronimi

Paper Abstract

The 20nm node, with a targeted wiring pitch of 64nm, is the first technology node to dip below the fundamental k1=0.25 resolution limit of high-NA 193nm immersion lithography. Double-patterning has been applied in previous technology nodes to address specific image quality issues such as line-end shortening or poor process window on contacts and vias, but never before has double-patterning been used to form images below the frequency-doubled resolution-limit of optical lithography. This paper describes the design-technology co-optimization efforts exercised by the alliance program for Bulk CMOS technology development at IBM in pursuit of cost-effective double-patterning for the 20nm technology node. The two primary double-patterning contenders, pitch-splitting and sidewall-image-transfer, are reviewed and their unique layout decomposition requirements are contrasted. Double-patterning design enablement solutions and their particular applicability to each step in the design flow are described. The paper closes with a review of the costeffectiveness of current double-patterning solutions, highlighting the important role of design-technology cooptimization in ensuring continued cost-effective semiconductor scaling.

Paper Details

Date Published: 2 April 2010
PDF: 11 pages
Proc. SPIE 7641, Design for Manufacturability through Design-Process Integration IV, 764105 (2 April 2010); doi: 10.1117/12.847222
Show Author Affiliations
Lars W. Liebmann, IBM Corp. (United States)
Jongwook Kye, GLOBALFOUNDRIES Inc. (United States)
Byung-Sung Kim, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Lei Yuan, GLOBALFOUNDRIES (Singapore)
Jean-Pierre Geronimi, STMicroelectronics (France)

Published in SPIE Proceedings Vol. 7641:
Design for Manufacturability through Design-Process Integration IV
Michael L. Rieger; Joerg Thiele, Editor(s)

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