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Proceedings Paper

Defect metrology challenges at the 11-nm node and beyond
Author(s): Timothy F. Crimmins
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Paper Abstract

Rapid, inline inspection of wafers and reticles for minimum pitch defects is expected to be a significant technical challenge at the 11nm node. With the possible future adoption of EUV lithography, increasingly exotic materials and complex device architectures, projecting end user requirements is a difficult feat 4 to 5 years out. The present work progresses through projections of these requirements and surveys the various options available to the industry, supported by microscopy simulations. The main conclusion is that the industry needs to support pathfinding projects to develop super-resolution techniques, wavelength scaling and highly multiplexed, high defect contrast ebeam inspection.

Paper Details

Date Published: 1 April 2010
PDF: 12 pages
Proc. SPIE 7638, Metrology, Inspection, and Process Control for Microlithography XXIV, 76380H (1 April 2010); doi: 10.1117/12.846623
Show Author Affiliations
Timothy F. Crimmins, Intel Corp. (United States)

Published in SPIE Proceedings Vol. 7638:
Metrology, Inspection, and Process Control for Microlithography XXIV
Christopher J. Raymond, Editor(s)

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