Defectivity control continues to challenge advanced semiconductor manufacturing, especially immersion lithography processes. Immersion exposure tools are sensitive to incoming wafer defects, including top coat voids, surface defects, and other random or systematic anomalies. A single defective wafer could contaminate the exposure tool's immersion hood resulting in lengthy and costly repairs. To mitigate this problem, TEL developed an integrated and real-time macro inspection solution to identify defective wafers which could potentially damage immersion exposure tools. The Wafer Intelligent Scanner (WIS) module integrates within the CLEAN TRACK^TM LITHIUS Pro^TM platform without impacting footprint or throughput. By utilizing user defined inspection criteria, wafers can be inspected prior to and after exposure for macro defects. Wafers failing to meet inspection criteria prior to exposure are automatically re-routed to bypass the exposure tool and subsequent process modules.

Date Published: 15 April 2010
PDF: 9 pages
Proc. SPIE 7638, Metrology, Inspection, and Process Control for Microlithography XXIV, 763821 (15 April 2010);

Published in SPIE Proceedings Vol. 7638:
Metrology, Inspection, and Process Control for Microlithography XXIV
Christopher J. Raymond, Editor(s)