
Proceedings Paper
Process liability evaluation for beyond 22nm node using EUVLFormat | Member Price | Non-Member Price |
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Paper Abstract
Extreme ultraviolet lithography (EUVL) is the most promising candidate for the manufacture of devices with a half pitch
of 32 nm and beyond. We are now evaluating the process liability of EUVL in view of the current status of lithography
technology development. In a previous study, we demonstrated the feasibility of manufacturing 32-nm-node devices by
means of a wafer process that employed the EUV1, a full-field step-and-scan exposure tool. To evaluate yield, a test
pattern was drawn on a multilayer resist and exposed. After development, the pattern was replicated in SiO2 film by
etching, and metal wires were formed by a damascene process. Resolution enhancement is needed to advance to the 22-
nm node and beyond, and a practical solution is off-axis illumination (OAI). This paper presents the results of a study on
yield improvement that used a 32-nm-node test chip, and also clarifies a critical issue in the use of EUVL in a wafer
process for device manufacture at the 22-nm node and beyond.
Paper Details
Date Published: 22 March 2010
PDF: 8 pages
Proc. SPIE 7636, Extreme Ultraviolet (EUV) Lithography, 76361O (22 March 2010); doi: 10.1117/12.846265
Published in SPIE Proceedings Vol. 7636:
Extreme Ultraviolet (EUV) Lithography
Bruno M. La Fontaine, Editor(s)
PDF: 8 pages
Proc. SPIE 7636, Extreme Ultraviolet (EUV) Lithography, 76361O (22 March 2010); doi: 10.1117/12.846265
Show Author Affiliations
Kazuo Tawarayama, Semiconductor Leading Edge Technologies, Inc. (Japan)
Hajime Aoyama, Semiconductor Leading Edge Technologies, Inc. (Japan)
Kentaro Matsunaga, Semiconductor Leading Edge Technologies, Inc. (Japan)
Yukiyasu Arisawa, Semiconductor Leading Edge Technologies, Inc. (Japan)
Taiga Uno, Semiconductor Leading Edge Technologies, Inc. (Japan)
Shunko Magoshi, Semiconductor Leading Edge Technologies, Inc. (Japan)
Suigen Kyoh, Toshiba Corp. (Japan)
Yumi Nakajima, Toshiba Corp. (Japan)
Ryoichi Inanami, Toshiba Corp. (Japan)
Hajime Aoyama, Semiconductor Leading Edge Technologies, Inc. (Japan)
Kentaro Matsunaga, Semiconductor Leading Edge Technologies, Inc. (Japan)
Yukiyasu Arisawa, Semiconductor Leading Edge Technologies, Inc. (Japan)
Taiga Uno, Semiconductor Leading Edge Technologies, Inc. (Japan)
Shunko Magoshi, Semiconductor Leading Edge Technologies, Inc. (Japan)
Suigen Kyoh, Toshiba Corp. (Japan)
Yumi Nakajima, Toshiba Corp. (Japan)
Ryoichi Inanami, Toshiba Corp. (Japan)
Satoshi Tanaka, Toshiba Corp. (Japan)
Ayumi Kobiki, Toshiba Corp. (Japan)
Yukiko Kikuchi, Toshiba Corp. (Japan)
Daisuke Kawamura, Toshiba Corp. (Japan)
Kosuke Takai, Toshiba Corp. (Japan)
Koji Murano, Toshiba Corp. (Japan)
Yumi Hayashi, Toshiba Corp. (Japan)
Ichiro Mori, Semiconductor Leading Edge Technologies, Inc. (Japan)
Ayumi Kobiki, Toshiba Corp. (Japan)
Yukiko Kikuchi, Toshiba Corp. (Japan)
Daisuke Kawamura, Toshiba Corp. (Japan)
Kosuke Takai, Toshiba Corp. (Japan)
Koji Murano, Toshiba Corp. (Japan)
Yumi Hayashi, Toshiba Corp. (Japan)
Ichiro Mori, Semiconductor Leading Edge Technologies, Inc. (Japan)
Published in SPIE Proceedings Vol. 7636:
Extreme Ultraviolet (EUV) Lithography
Bruno M. La Fontaine, Editor(s)
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