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Proceedings Paper

Litho scenario solutions for FinFET SRAM 22nm node
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Paper Abstract

For the development of the most cost effective lithographic solutions for the 22nm node, the lithographic process and relevant requirements on CDU and overlay need to be identified. In this work, 22nm logic SRAM is selected as use case because FinFET SRAM cells are considered to be a potential successor to conventional planar transistors for 22nm node chips. We focus on the back-end layers of FinFET SRAM, including metal and contact. Litho solutions simulated under ideal scanner conditions with the ASML Brion TachyonTM SMO product are shown. This tool co-optimizes a pixilated freeform source and a continuous transmission gray tone mask based on merit functions of edge placement error. Per scenario, these simulations result in a set of preferred litho solutions with respective source and mask. These solutions have to comply with an imaging metric characterized by MEEF and common PW based on typical fab requirements. In a second step the previously generated solutions are evaluated for CDU analysis using realistic scanner error budget. The purpose is to predict the CDU performance of scanner, process and reticle in order to identify the major contributors for every scenario solution.

Paper Details

Date Published: 12 December 2009
PDF: 12 pages
Proc. SPIE 7520, Lithography Asia 2009, 752025 (12 December 2009); doi: 10.1117/12.837495
Show Author Affiliations
Shih-En Tseng, ASML Taiwan Ltd. (Taiwan)
Shun-Der Wu, ASML Taiwan Ltd. (Taiwan)
Jacques Wang, ASML Taiwan Ltd. (Taiwan)
Jay Kou, ASML Taiwan Ltd. (Taiwan)
Orion Mouraille, ASML Netherlands B.V. (Netherlands)
Reiner Jungblut, ASML Taiwan Ltd. (Taiwan)
Tsann-Bim Chiou, ASML Taiwan Ltd. (Taiwan)
Jo Finders, ASML Netherlands B.V. (Netherlands)
Alek Chen, ASML Taiwan Ltd. (Taiwan)
Mircea Dusa, ASML Belgium (Belgium)
Stephen Hsu, Brion Technologies, Inc. (United States)

Published in SPIE Proceedings Vol. 7520:
Lithography Asia 2009
Alek C. Chen; Woo-Sung Han; Burn J. Lin; Anthony Yen, Editor(s)

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