
Proceedings Paper
A 100mA fractional step-down charge pump with digital controlFormat | Member Price | Non-Member Price |
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Paper Abstract
A switched capacitor step-down DC-DC converter (charge pump) is proposed. High efficiency is achieved by
combination of fractional conversion ratios (different step-down modes of operation), output voltage sensing and pulse
skipping based digital control techniques. Two control techniques were implemented with automatic change between
modes and their results are discussed and compared. The power module has 9 switches, implemented with 14 power
transistors, and a current limit circuit to mitigate the in-rush current in startup phase. This circuit has been designed in
AMS C35B4 (0.35um) CMOS process.
The charge pump was designed to provide a maximum load current of 100mA. The peak-to-peak output voltage ripple is
less than 30mV with two 3uF flying capacitors and one 20uF output capacitor. Peak and average efficiencies, with
maximum load current, are over 80% and 68%, respectively.
Paper Details
Date Published: 28 May 2009
PDF: 12 pages
Proc. SPIE 7363, VLSI Circuits and Systems IV, 73630U (28 May 2009); doi: 10.1117/12.822917
Published in SPIE Proceedings Vol. 7363:
VLSI Circuits and Systems IV
Teresa Riesgo; Eduardo de la Torre; Leandro Soares Indrusiak, Editor(s)
PDF: 12 pages
Proc. SPIE 7363, VLSI Circuits and Systems IV, 73630U (28 May 2009); doi: 10.1117/12.822917
Show Author Affiliations
Valter A. L. Sadio, Instituto Superior Técnico (Portugal)
INESC-ID (Portugal)
Abílio E. M. Parreira, INESC-ID (Portugal)
INESC-ID (Portugal)
Abílio E. M. Parreira, INESC-ID (Portugal)
Marcelino B. Santos, Instituto Superior Técnico (Portugal)
INESC-ID (Portugal)
Silicon Gate (Portugal)
INESC-ID (Portugal)
Silicon Gate (Portugal)
Published in SPIE Proceedings Vol. 7363:
VLSI Circuits and Systems IV
Teresa Riesgo; Eduardo de la Torre; Leandro Soares Indrusiak, Editor(s)
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