
Proceedings Paper
High-precision contouring from SEM image in 32-nm lithography and beyondFormat | Member Price | Non-Member Price |
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Paper Abstract
We developed a new contouring technology that executes contour re-alignment based on a matching of the measured
contour with the design data. By this 'secondary' pattern matching (the 'primary' being the pattern recognitions that is
done by the SEM during the measurement itself), rotation errors and XY shifts are eliminated, placing the measured
contour at the correct position in the design coordinates system. In the next phase, the developed method can generate
an averaged contour from multiple SEM images of identical structures, or from plural contours that are aligned
accurately by the algorithm we developed.
When the developed contouring technology is compared with the conventional one, it minimizes contouring errors and
pattern roughness effects to the minimum and enables contouring that represents the contour across the wafer.
The Contour that represents the contour across the wafer we call "Measurement Based Averaged Contour" or MBAC.
We will show that an OPC model that is built from these MBACs is more robust than an OPC model built from
contours that did not get this additional re-alignment.
Paper Details
Date Published: 12 March 2009
PDF: 9 pages
Proc. SPIE 7275, Design for Manufacturability through Design-Process Integration III, 72751F (12 March 2009); doi: 10.1117/12.814430
Published in SPIE Proceedings Vol. 7275:
Design for Manufacturability through Design-Process Integration III
Vivek K. Singh; Michael L. Rieger, Editor(s)
PDF: 9 pages
Proc. SPIE 7275, Design for Manufacturability through Design-Process Integration III, 72751F (12 March 2009); doi: 10.1117/12.814430
Show Author Affiliations
Hiroyuki Shindo, Hitachi High-Technologies Corp. (Japan)
Akiyuki Sugiyama, Hitachi High-Technologies Corp. (Japan)
Hitoshi Komuro, Hitachi High-Technologies Corp. (Japan)
Yutaka Hojo, Hitachi High-Technologies Corp. (Japan)
Ryoichi Matsuoka, Hitachi High-Technologies Corp. (Japan)
John L. Sturtevant, Mentor Graphics Corp. (United States)
Akiyuki Sugiyama, Hitachi High-Technologies Corp. (Japan)
Hitoshi Komuro, Hitachi High-Technologies Corp. (Japan)
Yutaka Hojo, Hitachi High-Technologies Corp. (Japan)
Ryoichi Matsuoka, Hitachi High-Technologies Corp. (Japan)
John L. Sturtevant, Mentor Graphics Corp. (United States)
Thuy Do, Mentor Graphics Corp. (United States)
Ir Kusnadi, Mentor Graphics Corp. (United States)
Germain Fenger, Mentor Graphics Corp. (United States)
Peter De Bisschop, IMEC vzw (Belgium)
Jeroen Van de Kerkhove, IMEC vzw (Belgium)
Ir Kusnadi, Mentor Graphics Corp. (United States)
Germain Fenger, Mentor Graphics Corp. (United States)
Peter De Bisschop, IMEC vzw (Belgium)
Jeroen Van de Kerkhove, IMEC vzw (Belgium)
Published in SPIE Proceedings Vol. 7275:
Design for Manufacturability through Design-Process Integration III
Vivek K. Singh; Michael L. Rieger, Editor(s)
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