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Proceedings Paper

193-nm immersion lithography for high volume manufacturing using novel immersion exposure tool and coater/developer system
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Paper Abstract

The demand for more highly integrated semiconductor devices is driving efforts to reduce pattern dimensions in semiconductor lithography. It has been found that 193-nm immersion lithography can achieve smaller patterns without having to modify the infrastructure used for existing state-of-the-art 193-nm dry lithography. As a result, 193-nm immersion lithography is a promising technology for use in mass production processes. Recently, the scanning speed of the exposure stage has been increasing in order to achieve high throughput for mass production. Currently, the topcoat process is one of the promising candidates for this high speed scanning process. On the other hand, the non topcoat resist process is being tested from a C.O.O. (cost of ownership) point of view. However, there are some important points that become apparent, such as specific defect countermeasures and wafer bevel control. Nikon and TEL developed the novel immersion exposure tool and coater/developer system application technology in order to solve these immersion specific issues. In this paper, we examine the process performance using novel immersion exposure tool and coater/developer system.

Paper Details

Date Published: 4 December 2008
PDF: 8 pages
Proc. SPIE 7140, Lithography Asia 2008, 714039 (4 December 2008); doi: 10.1117/12.804675
Show Author Affiliations
Shinya Wakamizu, Tokyo Electron Kyushu Ltd. (Japan)
Hideharu Kyouda, Tokyo Electron Kyushu Ltd. (Japan)
Katsushi Nakano, Nikon Corp. (Japan)
Tomoharu Fujiwara, Nikon Corp. (Japan)

Published in SPIE Proceedings Vol. 7140:
Lithography Asia 2008
Alek C. Chen; Burn Lin; Anthony Yen, Editor(s)

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