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Proceedings Paper

True reticle cost saving by multi level reticle approach
Author(s): Thomas Struck; Hendrik Kirbach
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Paper Abstract

Today reticle costs become one of the main contributors in the cost of manufacturing of advanced logic products. Especially for low volume projects as of product sampling as well as design and product verifications the saving of reticle costs becomes worthwhile. Multi level reticles are the combination of more then one lithographical layer on one physical reticle. Due to this approach the physical amount of reticles per tape out will be reduced and thereby also the costs for reticles will be significantly decreased. The multi level reticle approach is implemented as standard option in the INFINEON Technologies tape out flow for advanced logic products. This means dependent on forecasted volume and chip size it could be decided to tape out a project on multi level- or single level reticle. Technical setup, reticle layout, specification, CAD flow and experience in daily work using multi level reticles in different design nodes will be shown. Reticle cost advantage versus reduced throughput will be discussed.

Paper Details

Date Published: 17 October 2008
PDF: 7 pages
Proc. SPIE 7122, Photomask Technology 2008, 712233 (17 October 2008); doi: 10.1117/12.800920
Show Author Affiliations
Thomas Struck, Infineon Technologies AG (Germany)
Hendrik Kirbach, Infineon Technologies Dresden GmbH & Co. OHG (Germany)

Published in SPIE Proceedings Vol. 7122:
Photomask Technology 2008
Hiroichi Kawahira; Larry S. Zurbrick, Editor(s)

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