This paper reviews the DARPA MTO STAP-BOY program for both Phase I and II. The STAP-BOY program conducts fast covariance factorization and tuning techniques for space-time adaptive process (STAP) Algorithm Implementation on Graphics Processor unit (GPU) Architectures for Embedded Systems. Emerging capabilities in stream and multi-core computation, along with high speed memory bandwidths in commercial GPU architectures, are enabling breakthrough low-cost and low-power teraflop computing solutions to DoD-embedded computing challenges. Under the DARPA MTO STAP-BOY program, SAIC and Duke University, in cooperation with commercial graphics processor companies, have been mapping complex signal processing algorithms to GPU architectures. Algorithms undergoing implementation include STAP applications for radar adaptive beamforming and spin-image surface matching applications for object recognition in 3-D range-image data.

Date Published: 16 April 2008
PDF: 8 pages
Proc. SPIE 6979, Independent Component Analyses, Wavelets, Unsupervised Nano-Biomimetic Sensors, and Neural Networks VI, 69790V (16 April 2008); doi: 10.1117/12.791888

Published in SPIE Proceedings Vol. 6979:
Independent Component Analyses, Wavelets, Unsupervised Nano-Biomimetic Sensors, and Neural Networks VI
Harold H. Szu; F. Jack Agee, Editor(s)