
Proceedings Paper
Scatterometry as technology enabler for embedded SiGe processFormat | Member Price | Non-Member Price |
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Paper Abstract
New material innovations such as Embedded Silicon Germanium (eSiGe) provide a substantial metrology challenge for
the 45 nm node technology and beyond. We discuss the details of how scatterometry provides in-line metrology solution
to measure key features of the eSiGe structure. Critical features to measure are eSiGe to gate proximity and the un-etched
silicon on insulator (SOI) thickness. The proximity measurement is particularly vital because it has a major
influence on device performance, yet there was no high throughput in-line metrology solution until scatterometry.
Results from multiple scatterometry platforms (three) are presented along with a summary of various metrology
performance metrics like precision and accuracy. We also show how scatterometry measurements have been
instrumental in supporting process development efforts. The comparison of scatterometry measurements to reference
data from multiple metrology techniques is presented in order to evaluate the accuracy performance of various supplier
platforms. Reference metrology techniques used are thin-film measurements from un-patterned targets, transmission
electron microscopy (TEM) and cross-section scanning electron microscopy (XSEM). Tool matching uncertainty
(TMU) analysis and weighted reference measurement system (wRMS) technique have been utilized to assist in the
interpretation of correlation data. Scatterometry results from various wafers that were generated to modulate spacer
width and etch cavity are also presented. The results demonstrate good sensitivity for key measurement features,
especially eSiGe proximity and un-etched SOI thickness, which have very tight process control requirements.
Paper Details
Date Published: 22 March 2008
PDF: 13 pages
Proc. SPIE 6922, Metrology, Inspection, and Process Control for Microlithography XXII, 69220U (22 March 2008); doi: 10.1117/12.774564
Published in SPIE Proceedings Vol. 6922:
Metrology, Inspection, and Process Control for Microlithography XXII
John A. Allgair; Christopher J. Raymond, Editor(s)
PDF: 13 pages
Proc. SPIE 6922, Metrology, Inspection, and Process Control for Microlithography XXII, 69220U (22 March 2008); doi: 10.1117/12.774564
Show Author Affiliations
Alok Vaid, Advanced Micro Devices, Inc. (United States)
Rohit Pal, Advanced Micro Devices, Inc. (United States)
Matthew Sendelbach, IBM Corp. (United States)
Rohit Pal, Advanced Micro Devices, Inc. (United States)
Matthew Sendelbach, IBM Corp. (United States)
Shahin Zangooie, IBM Corp. (United States)
Kevin Lensing, Advanced Micro Devices, Inc. (United States)
Carsten Hartig, AMD Saxony Manufacturing GmbH (Germany)
Kevin Lensing, Advanced Micro Devices, Inc. (United States)
Carsten Hartig, AMD Saxony Manufacturing GmbH (Germany)
Published in SPIE Proceedings Vol. 6922:
Metrology, Inspection, and Process Control for Microlithography XXII
John A. Allgair; Christopher J. Raymond, Editor(s)
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