
Proceedings Paper
AWV: high-throughput cross-array cross-wafer variation mappingFormat | Member Price | Non-Member Price |
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Paper Abstract
Minute variations in advanced VLSI manufacturing processes are well known to
significantly impact device performance and die yield. These variations drive the need
for increased measurement sampling with a minimal impact on Fab productivity.
Traditional discrete measurements such as CDSEM or OCD, provide, statistical
information for process control and monitoring. Typically these measurements require a
relatively long time and cover only a fraction of the wafer area.
Across array across wafer variation mapping ( AWV) suggests a new approach for high
throughput, full wafer process variation monitoring, using a DUV bright-field inspection
tool. With this technique we present a full wafer scanning, visualizing the variation
trends within a single die and across the wafer.
The underlying principle of the AWV inspection method is to measure variations in the
reflected light from periodic structures, under optimized illumination and collection
conditions. Structural changes in the periodic array induce variations in the reflected
light. This information is collected and analyzed in real time.
In this paper we present AWV concept, measurements and simulation results.
Experiments were performed using a DUV bright-field inspection tool (UVision(TM), Applied
Materials) on a memory short loop experiment (SLE), Focus Exposure Matrix (FEM) and
normal wafers. AWV and CDSEM results are presented to reflect CD variations within a
memory array and across wafers.
Paper Details
Date Published: 16 April 2008
PDF: 9 pages
Proc. SPIE 6922, Metrology, Inspection, and Process Control for Microlithography XXII, 69221S (16 April 2008); doi: 10.1117/12.772402
Published in SPIE Proceedings Vol. 6922:
Metrology, Inspection, and Process Control for Microlithography XXII
John A. Allgair; Christopher J. Raymond, Editor(s)
PDF: 9 pages
Proc. SPIE 6922, Metrology, Inspection, and Process Control for Microlithography XXII, 69221S (16 April 2008); doi: 10.1117/12.772402
Show Author Affiliations
Jeong-Ho Yeo, Samsung Electronics Co., Ltd. (South Korea)
Byoung-Ho Lee, Samsung Electronics Co., Ltd. (South Korea)
Tae-Yong Lee, Samsung Electronics Co., Ltd. (South Korea)
Gadi Greenberg, Applied Materials Israel (Israel)
Doron Meshulach, Applied Materials Israel (Israel)
Erez Ravid, Applied Materials Israel (Israel)
Byoung-Ho Lee, Samsung Electronics Co., Ltd. (South Korea)
Tae-Yong Lee, Samsung Electronics Co., Ltd. (South Korea)
Gadi Greenberg, Applied Materials Israel (Israel)
Doron Meshulach, Applied Materials Israel (Israel)
Erez Ravid, Applied Materials Israel (Israel)
Shimon Levi, Applied Materials Israel (Israel)
Kobi Kan, Applied Materials Israel (Israel)
Saar Shabtay, Applied Materials Israel (Israel)
Yehuda Cohen, Applied Materials Israel (Israel)
Ofer Rotlevi, Applied Materials Israel (Israel)
Kobi Kan, Applied Materials Israel (Israel)
Saar Shabtay, Applied Materials Israel (Israel)
Yehuda Cohen, Applied Materials Israel (Israel)
Ofer Rotlevi, Applied Materials Israel (Israel)
Published in SPIE Proceedings Vol. 6922:
Metrology, Inspection, and Process Control for Microlithography XXII
John A. Allgair; Christopher J. Raymond, Editor(s)
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